Marc Jones wrote: > Arne Georg Gleditsch wrote: >> Peter Stuge <[EMAIL PROTECTED]> writes: >>> Arne Georg Gleditsch wrote: >>>> The unrv2b uncompression algorithm appears to behave very badly in >>>> the absence of a proper cache. >>> But why does this improve when the algorithm runs out of RAM? >>> >>> Could ROM accesses be a factor? >> >> Yes, at least in the sense that running from ROM means we're running >> from an uncached memory region. I assume you'd notice much the same >> running from uncached DRAM as well. copy_and_run is one of the few >> things that run after cache-as-ram has been disabled but before our code >> has been copied to proper DRAM, so it is especially sensitive regarding >> code footprint. >> > > I have thought about this a while back and have wanted to make a > change. Disabling CAR should fixup the stack etc but for performance > reasons we should setup/leave ROM and RAM caching enabled on the BSP. > If you are interested in looking at that I think it would be great.
What CPU/chipset is this? On quite some ROM stays cacheable all the time, afaik -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: [EMAIL PROTECTED] • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
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