-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Am 12.03.2013 22:28, schrieb yhlu: > On Tue, Mar 12, 2013 at 7:04 AM, Patrick Georgi > <[email protected]> wrote: > >> as in our case, a bug in the coreboot resource allocator that >> leaves devices unallocated. > > What is the bar address? 0 - thinking about it, there's the other possibility that the (custom) hardware in question takes longer to enable its PCIe side which didn't matter on the PCBIOS system it was developed on since that took long enough to boot.
> Do you have kernel boot log that complains that? Not at hand, sorry. Essentially, the kernel determines a 0 BAR for the device and its bridge and starts allocating them in the region given by ACPI. ACPI reports the extended region, but the registers we modify in this change don't cover it completely. Patrick -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with undefined - http://www.enigmail.net/ iEYEARECAAYFAlE/tzUACgkQfp0gE8eLOvQhagCgjIrm8hTMnIlA1JshAFQgD9zu j5gAoMMBFWuVze5xA0aaHAvU4dEL1eEB =gFbx -----END PGP SIGNATURE----- -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
