On Tue, Mar 12, 2013 at 4:16 PM, Patrick Georgi <[email protected]> wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > Am 12.03.2013 22:28, schrieb yhlu: >> On Tue, Mar 12, 2013 at 7:04 AM, Patrick Georgi >> <[email protected]> wrote: >> >>> as in our case, a bug in the coreboot resource allocator that >>> leaves devices unallocated. >> >> What is the bar address? > 0 - thinking about it, there's the other possibility that the (custom) > hardware in question takes longer to enable its PCIe side which didn't > matter on the PCBIOS system it was developed on since that took long > enough to boot.
I mean register index in pci config space. is it in 0x10 to 0x30? or 0x184 or 0x190 etc? Thanks Yinghai -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
