Hello Dave, Paul, all.

Great thanks for fast response and some solution.

>I wanted to know if anybody could test this on a E350M1 to see if it fixes 
>the problem. 
The code was significally rewritten since 23023a5
The person who did rewriting probably inherited the issue.
As I can see now part of code doing same is in sb800.c not in late.c
===147===
static void set_sb800_gpp(device_t dev)
===173===
        /* 5.2 Enabling GPP Port A/B/C/D */
        //abcfg_reg(0xC0, 0xF << 4, 0x1 << 4);
        abcfg_reg(0xC0, 0xF << 4, dev->enabled ? 0x1 << (4 + port) : 0);

        printk(BIOS_DEBUG, "set_sb800_gpp() 3\n");
        /* 5.3 Releasing GPP Reset */
        abcfg_reg(0xC0, 0x1 << 8, 0x0 << 8);

        /* release training */
        abcfg_reg(0xC0, 0xF << 12, 0x0 << 12);
===cut=== 

And that part i think too

===370===
        case (0x15 << 3) | 0:
                set_sb800_gpp(dev);
                index = 4;
                break;
        case (0x15 << 3) | 1:
        case (0x15 << 3) | 2:
        case (0x15 << 3) | 3:
                break;
===cut===


>Any takers? 
well, i can test applied patch on older snapshots but do not think it will 
worth it since master code is rewritten. it is better to get solution for 
current master.

PS. may be there is some my fault that patch is not much useful, i did report i 
tested git reverse on current master to Paul, but with checking later i found 
git was not latest master. when i found it i did fresh git clone to be sure and 
can confirm the issue still happen with rewritten code.

Thanks to all,
openvoid


-- 
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to