Hi, >> Change the .write field to spi_chip_write_1 > > Yes, that one indeed should have been spi_chip_write_1.
Sucessfully flashed coreboot, thanks to patch Damien mail and this correction. Yay! A few questions: As I understand it the long procedere with bucts and dd'ing around the top 64k of the image is only needed to deal with the restrictions applied by the factory bios. Once running on coreboot I can update to a newer build with flashrom without any tricks needed. Correct? How can I test stuff without risking to lock out myself? I guess the fallback mechanism is meant to be used for that? Having a known-good build in "fallback" and the freshly coded stuff in "normal"? Now the big question is how can I switch the payload to fallback in case the normal payload doesn't boot so I can't simply run nvramtool for that? thanks, Gerd -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
