On 03/27/2014 03:13 PM, Patrick Georgi wrote:
Am 2014-03-27 14:00, schrieb Andrew Wu:
So if I want to get rid of romcc, maybe I have to write DRAM init code
in assembly, That is not very easy. :(
If you can make it compile in romcc without relying on coreboot base
libraries, we could keep Vortex86 RAM init building via romcc. As I
understand Stefan, his main motivation for this push is to clean out all
the romcc related special cases in coreboot's core.
Patrick
Can we think of building vortex86ex raminit in bootblock? Having a quick
look at it, it seems SPD / SMBus is not involved and only the bank
geometry is programmed in PCI config space.
We are still stuck with romcc for x86 bootblock for quite some time.
And microcode updates done in bootblock will continue to use MSRs and
CPUID so is there much that can be cleaned out there?
I have patches in review queue that effectively remove the duplicate
implementation of UART console for ROMCC boards. But the macros like
print_debug() are used all over the tree, not just ROMCC boards.
Kyösti
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
