>> ahwan writes >> Please advise, thank you. Mario (Werner),
You should offer to this guy job (Siemens Motion Control) in DE (Bayern). He is tough guy, as I read/percept. I am (dead) serious. Zoran Stojsavljevic On Fri, Nov 3, 2017 at 8:37 AM, ahW@n via coreboot <[email protected]> wrote: > Hi Mario, > > I read your reply and saw you have APL CRB Oxbow Hill with coreboot + > SeaBios running. > I am using the same board and wanted to build the coreboot but failed. > I think I have the required files ready (bootable UEFI BIOS file, > fitimage.bin, Fsp.fd ...) > But still failed to build my coreboot. > I wonder I am having correct .config settings. > Can you share your settings? > I check the attachment in previous list but all that is for leafhill, I > wonder are they same and valid for both Oxbox Hill and Leafhill? > Please advise, thank you. > > - ahwan > > > > Scheithauer, Mario Mario.Scheithauer at siemens.com > > Wed Nov 1 16:28:45 CET 2017 > > Previous message (by thread): [coreboot] Coreboot support on H8SGL-F > > Next message (by thread): [coreboot] Problems changing payload on Intel > Leaf Hill > > Messages sorted by: [ date ] [ thread ] [ subject ] [ author ] > > Hi Tahnia, > > > > We have an APL CRB Oxbow Hill (B0-stepping) with coreboot (master) + > SeaBios (master) running. > > Attached are all necessary coreboot adaptions and the config file for > SeaBios. > > After the generation, a hack in coreboot.rom is still necessary so that > SeaBios can find the VBIOS. > > SeaBios expects at the end of the CBFS the address from the beginning of > the CBFS section (see SeaBiosPointer.jpg). > > Furthermore you have to pay attention to the IGD PCI ID. Intel uses > different PCI Device IDs in different CPU versions for IGD (5a84 or 5a85). > > The console output only works via MMIO on the CRB. Therefore you need > the LPSS UART0 Micro USB port. > > With all these adjustments we can boot a system on the CRB and have full > console output. > > Now you just need all the necessary blobs around coreboot (IFWI, FSP, > VBIOS, uCode). > > You can use the Intel FIT tool to separate the most of the components > from the original BIOS. > > > > Hope that helps, > > Mario > > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot >
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