Hi Cameron, Which version of Tianocore did you use? Did you make any changes to Tianocore to get it to work (because it still doesn't work for me)? E.g. did you have to change debug console port settings (similar to those needed for SeaBIOS to use MMIO serial)?
Did you specify the GOP driver in coreboot, and if so, which file did you use? Or did you include the GOP driver in the Tianocore build? Would you by any chance be willing to share the coreboot and Tianocore config files for your working combination? Regards, Tahnia On Thu, Nov 9, 2017 at 4:53 PM, Cameron Craig <[email protected]> wrote: > Hi Ahwan, > > >So, we can only expect Intel to solve this issue with new FSP package? > >Please keep us update, thank you. > > I managed to get my hands on APL FSP MR2 and I can confirm that it just > works. I have tested it with Tianocore. > This is at least a short term solution. I have not looked in to why MR3 > doesn’t work and currently have no plans on doing so. > > Cheers, > Cameron > > > Cameron Craig | Graduate Software Engineer | Exterity Limited > tel: +44 1383 828 250 | fax: | mobile: > e: [email protected] | w: www.exterity.com > > > > ______________________________________________________________________ > This email has been scanned by the Symantec Email Security.cloud service. > For more information please visit http://www.symanteccloud.com > ______________________________________________________________________ > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot >
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