-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 On 05/03/2018 03:44 AM, Kyösti Mälkki wrote: > On Wed, May 2, 2018 at 9:22 PM, Timothy Pearson > <tpear...@raptorengineering.com> wrote: >> -----BEGIN PGP SIGNED MESSAGE----- >> Hash: SHA256 >> >> We've been kicking around the idea for some time of getting a coreboot >> port to the POWER9 Talos II systems going. We don't have the resources >> available / free at the moment to work on this independently, but it >> might be possible to get something going if there are other community >> members interested in helping out. > > Count me in, I am getting sick and tired of x86 vendors ;) > > Kyösti
Sounds great, glad to have you on board! Any other volunteers? I've created a Wiki page where we can start tracking at least what needs to be done, and most importantly start documenting the various chunks of hardware that coreboot needs to set up [1]. It's preloaded with what I am sure is a very optimistic list of tasks; contributions are welcome as we iron out exactly what is involved here. I'd like to see what kind of manpower we can attract on-list here, then schedule some meetings around the best approach to the initial bringup. We can also figure out how to handle getting hardware access to the various folks involved. I don't know how much of the initial work is more practical in e.g. qemu versus on bare metal, given the complexity of some of the existing firmware stage handoffs. At minimum we should start documenting the entry and exit interfaces between SBE<-->coreboot<-->skiboot, along with expected processor state at entry/exit, to see what we're getting involved in. On the plus side we have direct access to LPC via the nest, and a BMC that receives LPC accesses including serial and port 80 traffic. This should make debugging fairly easy, once enough of a bootblock has been written to take over from the SBE and initialize enough of the nest to get LPC online. POWER9 doesn't have the concept of I/O space, so the LPC access is all handled via MMIO reads and writes to a specific set of addresses in the nest itself. There's a sizeable chunk of register documentation available on the OpenPOWER portal, although I think the detailed register manuals need an IBM account (freely available) and possibly a (free) OpenPOWER signup. There is no legal issue that we are aware of with using them to develop a libre firmware solution like coreboot; IBM just doesn't want the detailed register manuals distributed verbatim online at this time. Let's make this happen! [1] https://wiki.raptorcs.com/wiki/Coreboot/ToDo - -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBCAAGBQJa6vNMAAoJEK+E3vEXDOFbSCsH/Rl202jzyeOhoSi5z3N6RXVT Bwdtn6z9QTQhb7m8f4blmhlXNifdiooOrgLuCo9Vw5af+X1W06U+CJkAZlk8QRRh RpFUpZlZHv9s+Er+005XNjiqSFIxbEnlKddrGa3AwxNXBQaKNuJeIUCARyK98n3r JmuyaaMVnLksjc91wExIeeKyQDQo2VyrvnSMPDMIgbRPQrYEWWzs6rQNK2nQXl7n LL5xdVP2NT+pSX/zwtowmZkq26EDg8P9FfEAMHfhtGx3FyWK2R1cQ4cUhNqKKn5Y f33Ud5Kq+ZqzNFCKUz/HupiyaM1q4hoaqDrYjoPYA9XWKu3jamQ4YXi0g0gFabk= =kzda -----END PGP SIGNATURE----- -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
