Hi Nico,
> How did you figure out the GPIO pins?
I found the schematics online.
> why are you using this system76 sequence?
The Lenovo hybrid_graphics code wasn't relevant enough, so I looked for the
function and arguments to call to set GPIOs. Once I had code to do that, I
didn't care to remove the system76 references, but it is fairly generic code.
> Hmmm, looking at the code, it doesn't seem to leave much time. IIRC, a
> PCI device should be given 100ms (or was it 200ms?) to show up.
Right. Well, the schematics define a *slightly* different sequence of GPIOs. If
a dGPU is present (DGPU_PRESENT asserted low indicates "OPTIMUS," as opposed to
"UMA"), DGPU_PWR_EN is meant to be sent. I think that triggers a VGA core power
enable GPIO pin and then DGPU_PWROK can be checked.
So, if PWROK means powered on (rather than that power is in a stable state,
which seems to be the case for system76), it can't check PWROK after disabling
power, so I commented out that loop and just added a delay.
The delay does sound like it is too short, could this be the problem? Also,
does it make sense to cut the code down to just using the above 3 pins,
ignoring HOLD_RST and never sending power disable?
Note: Even if it is a problem, somehow, it still gets PWROK. Hopefully, this
does not mean that it's getting a result set in gpio.h. With GPIO debugging on,
I did not see the messages as this code ran, only higher up in the ramstage log.
Some other questions:
1. Can and should this be done in ramstage, or should it be done earlier?
2. I added in "pc_keyboard_init(NO_AUX_DEVICE)" because the drivers in the ec
directory would run that to initialise their chips. (Do I need
"CONFIG_DRIVERS_PS2_KEYBOARD?") The printk before it never gets logged. What
does this mean and is it related/relevant?
3. Do I need to do anything with the EC? I know that the vendor firmware
includes the EC's ROM in a padding section at the top of the BIOS section, but
I did successfully boot into an OS using coreboot before. The laptop responds
to the power key, LED indicators and the battery work (well, OS thought it
wasn't present, but that was ACPI related), fans presumably spin and if I tried
charging it, it did that too.
As an aside, the first PCIe root port now appears. I don't know how this might
be tangled up with the dGPU, "pci 01.0" or anything else, but maybe it could be
appearing because of the SUBSYSTEM_{VENDOR,DEVICE}? In which case, perhaps boot
is freezing up because the dGPU isn't actually available?
> That is really odd, now I'm a little bit concerned about the well-
> being of your board.
No, they appear with the vendor firmware. I'd find it very weird, but maybe I
need "SOFTWARE_I2C?"
_______________________________________________
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
