Hi Everyone,
We have couple of queries regarding the current support and future direction of
arm64 port of coreboot:
1. Does the current coreboot/arm64 execute post BL31 stage (assuming a
separate BL2 stage loads BL31 and coreboot) ?
* If no, would coreboot community be willing to support such a flow (via
a build-time flag) ?
* Beyond the direct access of EL3 registers, what are the other
assumptions that the current coreboot/arm64 port has that need to be addressed
to allow such a NS-EL2 port ?
2. Does the current coreboot/arm64 port allow executing only the ramstage of
coreboot (say as a means of reducing the coreboot binary footprint) ?
Best Regards,
Sukanto
_______________________________________________
coreboot mailing list -- [email protected]
To unsubscribe send an email to [email protected]