Hello Sukanto, welcome to the coreboot mailinglist!
I'm not an expert on the arm64 port of coreboot. But generally the idea of coreboot is that it starts with the first instructions that are loaded from flash (or the reset vector, on platforms where its located in flash). On 20.10.21 11:04, Sukanto Ghosh via coreboot wrote: > 1. Does the current coreboot/arm64 execute post BL31 stage (assuming a > separate BL2 stage loads BL31 and coreboot) ? I'm not sure if I understand the question. AIUI, the coreboot ARM ports act like BL2. So what would coreboot do if loaded by a separate BL2? > 2. Does the current coreboot/arm64 port allow executing only the ramstage > of coreboot (say as a means of reducing the coreboot binary footprint) ? Don't know what "allow" would imply here. It's not expected. Technically, it's possible though. If you prepare everything to look like a coreboot environment, coreboot's ramstage should work ofc. But I don't think it would reduce the overall footprint. People sometimes want to integrate parts of coreboot with already written code for other frameworks, like you suggested. However in my experience, the effort to design clean interfaces and integrate everything together exceeds the effort to write a native coreboot port (often by an order of magnitude). I wonder, have you evaluated a native coreboot port yet? It might actually reduce your costs. Please consider it :) Nico _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
