Hi Rao, On 28.01.22 14:30, Rao G wrote: > 2) > ScSpiBar0 = MmioRead32 (SpiInstance->PchSpiBase + > PCI_BASE_ADDRESSREG_OFFSET) & 0xFFFFF000; > > Expectation: > this should return value at 0xC00FD010 > > Result > The above code is throwing processor exception > > PchSpiBase at 0xC00FD000 > !!!! X64 Exception Type - 0E(#PF - Page-Fault) CPU Apic ID - 00000000 !!!! > ExceptionData - 0000000000000000 I:0 R:0 U:0 W:0 P:0 PK:0 SS:0 SGX:0 > RIP - 00000000771903D0, CS - 0000000000000038, RFLAGS - 0000000000010046
this is literally as it says, a page fault. Just like in any other OS (and wrt. this UEFI is an OS) you have to map physical memory using page tables before you can access it. There is likely a very simple function you have to call to turn your physical address into a virtual pointer that you can use in C. I'm not familiar with UEFI, so can't tell you what to call. Better ask UEFI developers. > > Any clues whether SPI flash needs to be enabled in descriptor or any straps > by using FIT tool? No, this problem is a generic one and far away from your particular controller. It's not even about hardware (beside that you run it on a computer ^^). Nico _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
