On Fri, Oct 3, 2025 at 5:09 PM Undescribed Horrific Abuse, One Victim & Survivor of Many <[email protected]> wrote:
> information from the fairchild semiconductor data sheet for the > lm555/ne555/sa555 single timer (as archived on ben eater’s website) > rev 1.0.3 2002 > > front page > > Features > - High Current Drive Capability (200mA) > - Adjustable Duty Cycle > - Temperature Stability of 0.005%/degC > - Timing From uSec to Hours > - Turn off Time Less Than 2uSec > > Applications > - Precision Timing > - Pulse Generation > - Time Delay Generation > - Sequential Timing > > Description > The xx555 is a highly stable controller capable of producing accurate > timing pulses. With a monostable operation, the time delay is controlled by > one external resistor and one capacitor. With an a stable operation, the > frequency and duty cycle are accurately controlled by two external > resistors and one capacitor. > > 8-DIP / 8-SOP : pin 1 is labeled as the front-right lead with the length > of the body of the chip aiming away from the viewer. there may be a marking > on the upper side of the package near to the viewer, but it is not clear > > Internal Block Diagram > > GND 1 - R -+- R -+- R - 8 VCC > | > Trigger 2 - - 7 Discharge > Output 3 - 6 Threshold > Reset 4. - 5 Control Voltage > > the resistor triplet from gnd to vcc are arranged in a 1/3rd 2/3rds > voltage divider . There are two triangles labeled Comp. that connect to the > lower and higher voltage divisions. The first Comp has its + input to the > 1/3rd division and its - input to 2 Trigger. The output goes to an internal > block labeled F/F . The second Comp. has its - input to the 2/3rd division > and its + from 6 Threshold. Its output goes to a different side of F/F. > Output 3 comes from a block labeled OutPut Stage which itself comes from > F/F. > Reset goes to the bottom of a T with a diagonal line coming off each top. > The right diagonal is an arrow pointing at the T and stems from an open > circle labeled Vref. The left diagonal goes to F/F. > 5 Control Voltage is also connected to the negative lead of the second > Comp, and hence wired into the resistor line from VCC to GND (on the high > end). > 7 discharge goes to another T with diagonals. It is on the right diagonal > which lacks an arrow. The left diagonal has an arrow pointing away and goes > to a ground symbol. The T is labeled Discharging Tr. The bottom goes to F/F > . > > Page 2 > > Absolute Maximum Ratings (T_A = 25degC) > > Parameter Symbol Value Unit > > Supply Voltage V_CC 16 V > Lead Temperature (Soldering 10sec) T_LEAD 300 degC > Power Dissipation P_D 600 mW > Operating Temperature Range > LM555/NE555 T_OPR 0 ~ +70 degC > SA555 -40 ~ +85 > Storage Temperature Range T_STG -65 ~ +150 degC > > Page 3 > Electrical Characteristics > (T_A = 25degC, V_CC = 5 ~ 15V, unless otherwise specified) > > Parameter Symbol > > Supply Voltage V_CC > Supply Current (Low Stable)(Note1) I_CC > > … wow that’s a lot of data to try to format on mobile, lots of voltage and > error specs on page 3, footnotes at the bottom. This is important stuff if > designing a circuit to use this! > > Page 4 > > …. > this chip has two operating modes described at the start of the data sheet, called “monostable” and “astable”. On pages 4-10, 6 modes are described: 1. Monostable operation (pg4) 2. Astable operation (pg5) 3. Frequency divider (pg7) … 4. Pulse width modulation (pg8) control is a sine … 5. Pulse position modulation (pg8) control is a damped offset sine with trigger a sawtooth that proportionally follows the sine in both offset and magnitude output changes frequency depending on control, mostly high with brief 0s at the tooth of the saw 6. Linear ramp (pg9) trigger is sawtooth, output is mostly high with brief 0s at the tooth of the saw
