So can the DDR memory be changed to support the bandwidth?  Does anyone have
any suggestion.  What I am trying to do is have 4 video source and at any
one time recoded 1 channel to disk while displaying another on the monitor
and if possible also be able to display a quad view of all 4 channels on the
monitor display.
 
 
 
Jon Povey wrote:
> I don't know about DM6446, but on DM355 the limiting factor is DDR 
> memory bandwidth. 
 
same for the 6441/6446, the limiting factor is DDR bandwidth, not
CPU/DSP/DMA speed.
 
> I tried to capture two sync locked 8-bit BT.656 
> streams side-by-side as 16-bit input and use DMA to separate them for 
> display. It worked, but there was not enough DDR memory bandwidth to do 
> this and output the image with an OSD enabled - VPBE was starved of data 
> and lots of tearing / visual artifacts appeared.
>  
> Not sure if you will have the same issues but it's something you might 
> want to be aware of.
> 
> --
> Jon Povey, Design Engineer
> jon.povey at racelogic.co.uk
<http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source>  |
+44(0)1280 825983
> 
>  
> 
>
------------------------------------------------------------------------
>     *From:* davinci-linux-open-source-bounces at linux.davincidsp.com
<http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source> 
>     [mailto:davinci-linux-open-source-bounces at linux.davincidsp.com
<http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source> ]
*On
>     Behalf Of *Panchy Rivas
>     *Sent:* 24 July 2008 20:18
>     *To:* davinci-linux-open-source at linux.davincidsp.com
<http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source> 
>     *Subject:* 4 video capture and SMP-linux support
> 
>     I am working on a similar system.  I just got the DM6446EVM today so
>     I am just getting started.  I was thinking because the front end
>     video port can be 1280 pixels per horizontal line then 2 channels
>     (minus a little bit on the edges) can fit side by side to process 2
>     channels.  If you include the interlace artifact remover then we
>     could actually fit 4 channels.  The TVP5154 could be used as the
>     decoder to a FPGA then to the DM6446. 
> 
>      
> 
>     Please if anyone has done this or similar please let me know if
>     there is enough resources to do this.
> 
>      
> 
>     Thank you,
> 
>     Panchy
> 
>  
> 
> Racelogic is a limited company registered in England. Registered number 
> 2743719 .
> Registered Office Unit 10, Swan Business Centre, Osier Way, Buckingham, 
> Bucks, MK18 1TB .
> 
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Thanks

Panchy Rivas

 

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