Sergei Shtylyov <[email protected]> writes: > Kevin Hilman wrote: > >> Clear any set bits in the 'NEXT' field of the MDCTL register in the >> Power and Sleep Controller (PSC) before setting any new bits. >> This also allows some minor cleanup by removing some no longer >> needed lines of code. > >> Signed-off-by: Mark A. Greer <[email protected]> >> Signed-off-by: Kevin Hilman <[email protected]> > > [...] > >> diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c >> index 90f02b5..f5694c1 100644 >> --- a/arch/arm/mach-davinci/psc.c >> +++ b/arch/arm/mach-davinci/psc.c >> @@ -39,6 +39,7 @@ >> #define MDSTAT 0x800 >> #define MDCTL 0xA00 >> +#define MDSTAT_STATE_MASK 0x1f > > As I've already said, MDSTAT_STATE_MASK should be > 0x3f. MDCTL_NEXT_MASK would have been 0x1f.
This patch simply changes the hard-coded 0x1f into a #define. If this should be changed to 0x3f, it should be done in a separate patch, with a separate description which can be tested separately across all the SoCs. Kevin _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
