Hi Agustin,
Here it is the patch (4th time I'm trying to send it)
I sent a message to "capiman" today, but it seems that there is no activity
from him for about 4 years.
Since we have lpctools, I don't know if to maintain lpc21isp is the best
solution (unless the the author wants to bring it to life again, of course)
I'm not using lpctools because it does not have the ability to enable the ISP
mode using the control lines (Reset = DTR, EnableBootLoader = RTS)
If the lpctools maintainer could implement some of the basic functionality that
are implemented in lpc21isp, I think it would be a better option.
Cristiano
On Wed, 7 Mar 2018 11:04:10 -0300 Agustin Henze <t...@debian.org> wrote:
> Hi Cristiano,
>
> On Wed, 07 Mar 2018 09:28:58 +0000 Cristiano Rodrigues <microc...@aeiou.pt>
> wrote:
> > Dear Maintainer,
> >
> > This is not a bug. I created a patch where it add support for LPC40xx
> > devices. It was published in the software autor site but it seems no one is
> > looking for it.
> > If possible, please apply the patch. I'm using it for more than a year and
> > it's working without problems.
>
> I guess that you forgot attach the patch. However I think you are talking
> about
> this thread[0] where I could find the source attached. As far I can see the
> project seems to be dead :'(. Have you tried contacting directly to the
> author[1]?
> Ok, I have took a look at it and the attachment seems to be all the source.
> Could please send me a patch instead? Anyway I still thinking that would be
> awesome if you contact to upstream and see if he still interested on
> maintaining the project maybe you can turn into upstream :).
>
> Cheers,
>
> [0]
> https://sourceforge.net/p/lpc21isp/discussion/889930/thread/6438fdc1/?limit=25
diff -Naur ./lpc21isp_197/lpc21isp.c ./lpc21isp_198/lpc21isp.c
--- ./lpc21isp_197/lpc21isp.c 2014-01-09 07:25:51.000000000 +0000
+++ ./lpc21isp_198/lpc21isp.c 2017-01-20 18:22:06.000000000 +0000
@@ -410,12 +410,15 @@
Updated .gitignore file (Now with ignored *.layout)
Removed *.layout from lpc21isp project
Removed *.depend from lpc21isp project
+ 1.97 2014-01-09 Martin Maurer
+1.98 2016-01-17 Cristiano Rodrigues
+ Add some new chip ids for LPC40xx
*/
// Please don't use TABs in the source code !!!
// Don't forget to update the version string that is on the next line
-#define VERSION_STR "1.97"
+#define VERSION_STR "1.98"
#if defined COMPILE_FOR_WINDOWS || defined COMPILE_FOR_CYGWIN
static char RxTmpBuf[256]; // save received data to this buffer for half-duplex
diff -Naur ./lpc21isp_197/lpcprog.c ./lpc21isp_198/lpcprog.c
--- ./lpc21isp_197/lpcprog.c 2014-01-08 19:38:26.000000000 +0000
+++ ./lpc21isp_198/lpcprog.c 2017-01-20 15:03:58.000000000 +0000
@@ -106,6 +106,15 @@
65536, 65536, 65536, 65536, 65536, 65536, 65536
};
+// Used for LPC40xx devices
+static const unsigned int SectorTable_40xx[] =
+{
+ 4096, 4096, 4096, 4096, 4096, 4096, 4096, 4096,
+ 4096, 4096, 4096, 4096, 4096, 4096, 4096, 4096,
+ 32768, 32768, 32768, 32768, 32768, 32768, 32768, 32768,
+ 32768, 32768, 32768, 32768, 32768, 32768
+};
+
// Used for LPC43xx devices
static const unsigned int SectorTable_43xx[] =
{
@@ -126,7 +135,7 @@
{
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, CHIP_VARIANT_NONE }, /* unknown */
- // id, id2, use id2, name of product, flash size, ram size, total number of sector, max copy size, sector table, chip variant
+ // id, id2, use id2, name of product, flash size, ram size, total number of sector, max copy size, sector table, chip variant
{ 0x00008100, 0x00000000, 0, "810M021FN8", 4, 1, 4, 256, SectorTable_8xx, CHIP_VARIANT_LPC8XX },
{ 0x00008110, 0x00000000, 0, "811M001FDH16", 8, 2, 8, 1024, SectorTable_8xx, CHIP_VARIANT_LPC8XX },
@@ -230,6 +239,7 @@
{ 0x25011722, 0x00000000, 0, "1754", 128, 32, 18, 4096, SectorTable_17xx, CHIP_VARIANT_LPC17XX },
{ 0x25011723, 0x00000000, 0, "1756", 256, 32, 22, 4096, SectorTable_17xx, CHIP_VARIANT_LPC17XX },
{ 0x25013F37, 0x00000000, 0, "1758", 512, 64, 30, 4096, SectorTable_17xx, CHIP_VARIANT_LPC17XX },
+ // id, id2, use id2, name of product, flash size, ram size, total number of sector, max copy size, sector table, chip variant
{ 0x25113737, 0x00000000, 0, "1759", 512, 64, 30, 4096, SectorTable_17xx, CHIP_VARIANT_LPC17XX },
{ 0x26012033, 0x00000000, 0, "1763", 256, 64, 22, 4096, SectorTable_17xx, CHIP_VARIANT_LPC17XX },
{ 0x26011922, 0x00000000, 0, "1764", 128, 32, 18, 4096, SectorTable_17xx, CHIP_VARIANT_LPC17XX },
@@ -314,6 +324,11 @@
{ 0x1600FF35, 0x00000000, 0, "2468", 512, 98, 28, 4096, SectorTable_213x, CHIP_VARIANT_LPC2XXX },
{ 0x1701FF30, 0x00000000, 0, "2470", 0, 98, 0, 4096, SectorTable_213x, CHIP_VARIANT_LPC2XXX },
{ 0x1701FF35, 0x00000000, 0, "2478", 512, 98, 28, 4096, SectorTable_213x, CHIP_VARIANT_LPC2XXX },
+
+ { 0x47011132, 0x00000000, 0, "4074", 128, 40, 18, 4096, SectorTable_40xx, CHIP_VARIANT_LPC40XX }, /*From UM10562 Rev. 03 -- 12 Mar 2014 */
+ { 0x47191F43, 0x00000000, 0, "4076", 256, 80, 22, 4096, SectorTable_40xx, CHIP_VARIANT_LPC40XX }, /*From UM10562 Rev. 03 -- 12 Mar 2014 */
+ { 0x47193F47, 0x00000000, 0, "4078", 512, 96, 30, 4096, SectorTable_40xx, CHIP_VARIANT_LPC40XX }, /*From UM10562 Rev. 03 -- 12 Mar 2014 */
+ { 0x481D3F47, 0x00000000, 0, "4088", 512, 96, 30, 4096, SectorTable_40xx, CHIP_VARIANT_LPC40XX }, /*From UM10562 Rev. 03 -- 12 Mar 2014 */
{ 0xA00A8B3F, 0x00000000, 1, "4310", 0, 168, 0, 4096, SectorTable_43xx, CHIP_VARIANT_LPC43XX }, /* From UM10503 Rev. 1.4 -- 3 Sep 2012 */
{ 0xA00BCB3F, 0x00000080, 1, "4312", 512, 104, 15, 4096, SectorTable_43xx, CHIP_VARIANT_LPC43XX }, /* info not yet available */
@@ -899,6 +914,7 @@
DebugPrintf(3, "Position 0x14 patched: ivt_CRC = 0x%08lX\n", ivt_CRC);
}
else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC43XX ||
+ LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC18XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC17XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC13XX ||
@@ -1199,6 +1215,7 @@
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC13XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC11XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC18XX ||
+ LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC43XX)
{
if ((CopyLength % (45 * 4)) != 0)
@@ -1223,6 +1240,7 @@
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC13XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC11XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC18XX ||
+ LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC43XX)
{
block_CRC = 0;
@@ -1579,6 +1597,7 @@
sprintf(tmpString, "G %ld A\r\n", IspEnvironment->StartAddress);
}
else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC43XX ||
+ LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC18XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC17XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC13XX ||
@@ -1615,6 +1634,7 @@
sprintf(ExpectedAnswer, "G %ld A\n0", IspEnvironment->StartAddress);
}
else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC43XX ||
+ LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC18XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC17XX ||
LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC13XX ||
@@ -1653,6 +1673,10 @@
{
return LPC_RAMSTART_LPC43XX;
}
+ else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX)
+ {
+ return LPC_RAMSTART_LPC40XX;
+ }
else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC2XXX)
{
return LPC_RAMSTART_LPC2XXX;
@@ -1688,6 +1712,10 @@
{
return LPC_RAMBASE_LPC43XX;
}
+ else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC40XX)
+ {
+ return LPC_RAMBASE_LPC40XX;
+ }
else if(LPCtypes[IspEnvironment->DetectedDevice].ChipVariant == CHIP_VARIANT_LPC2XXX)
{
return LPC_RAMBASE_LPC2XXX;
diff -Naur ./lpc21isp_197/lpcprog.h ./lpc21isp_198/lpcprog.h
--- ./lpc21isp_197/lpcprog.h 2014-01-08 17:46:46.000000000 +0000
+++ ./lpc21isp_198/lpcprog.h 2017-01-20 14:00:17.000000000 +0000
@@ -46,6 +46,9 @@
#define LPC_RAMSTART_LPC43XX 0x10000000L
#define LPC_RAMBASE_LPC43XX 0x10000200L
+#define LPC_RAMSTART_LPC40XX 0x10000000L
+#define LPC_RAMBASE_LPC40XX 0x10000200L
+
#define LPC_RAMSTART_LPC2XXX 0x40000000L
#define LPC_RAMBASE_LPC2XXX 0x40000200L
@@ -114,6 +117,7 @@
{
CHIP_VARIANT_NONE,
CHIP_VARIANT_LPC43XX,
+ CHIP_VARIANT_LPC40XX,
CHIP_VARIANT_LPC2XXX,
CHIP_VARIANT_LPC18XX,
CHIP_VARIANT_LPC17XX,
