Sorry, forgot the debdiff.
diff -Nru delve-1.20.2/debian/changelog delve-1.20.2/debian/changelog --- delve-1.20.2/debian/changelog 2023-04-07 10:17:37.000000000 +0200 +++ delve-1.20.2/debian/changelog 2026-07-02 18:10:00.000000000 +0200 @@ -1,3 +1,12 @@ +delve (1.20.2-1+deb12u1) bookworm; urgency=medium + + * Team upload. + + [ Shengjing Zhu ] + * Backport patch to fix tests on AMD CPU with AVX512. Closes: #1082973. + + -- Santiago Vila <[email protected]> Thu, 02 Jul 2026 18:10:00 +0200 + delve (1.20.2-1) unstable; urgency=medium * New upstream version 1.20.2 diff -Nru delve-1.20.2/debian/patches/0006-proc-use-CPUID-to-determine-ZMM_Hi256-region-offset.patch delve-1.20.2/debian/patches/0006-proc-use-CPUID-to-determine-ZMM_Hi256-region-offset.patch --- delve-1.20.2/debian/patches/0006-proc-use-CPUID-to-determine-ZMM_Hi256-region-offset.patch 1970-01-01 01:00:00.000000000 +0100 +++ delve-1.20.2/debian/patches/0006-proc-use-CPUID-to-determine-ZMM_Hi256-region-offset.patch 2026-07-02 16:06:00.000000000 +0200 @@ -0,0 +1,157 @@ +From: Jiajie Chen <[email protected]> +Date: Sun, 13 Oct 2024 10:34:06 +0800 +Subject: proc: use CPUID to determine ZMM_Hi256 region offset + +The offset of state component i can be found via +CPUID.(EAX=0DH,ECX=i):EBX. The ZMM_Hi256 is state component 6, so we use +CPUID to enumerate the offset instead of hardcoding. + +For core dumps, we guess the ZMM_Hi256 offset based on xcr0 and the +length of xsave region. The logic comes from binutils-gdb. + +Fixes #3827. +--- + pkg/proc/amd64util/xsave.go | 20 ++++++++++++++++---- + pkg/proc/amd64util/xsave_amd64.go | 25 +++++++++++++++++++++++++ + pkg/proc/amd64util/xsave_other.go | 5 +++++ + pkg/proc/core/linux_core.go | 2 +- + pkg/proc/native/ptrace_freebsd_amd64.go | 2 +- + pkg/proc/native/ptrace_linux_386.go | 2 +- + pkg/proc/native/ptrace_linux_amd64.go | 2 +- + 7 files changed, 50 insertions(+), 8 deletions(-) + +--- a/pkg/proc/amd64util/xsave.go ++++ b/pkg/proc/amd64util/xsave.go +@@ -79,7 +79,6 @@ + _XSAVE_HEADER_LEN = 64 + _XSAVE_EXTENDED_REGION_START = 576 + _XSAVE_SSE_REGION_LEN = 416 +- _XSAVE_AVX512_ZMM_REGION_START = 1152 + ) + + // AMD64XstateRead reads a byte array containing an XSAVE area into regset. +@@ -87,7 +86,8 @@ + // contents of the legacy region of the XSAVE area. + // See Section 13.1 (and following) of Intel® 64 and IA-32 Architectures + // Software Developer’s Manual, Volume 1: Basic Architecture. +-func AMD64XstateRead(xstateargs []byte, readLegacy bool, regset *AMD64Xstate) error { ++// If xstateZMMHi256Offset is zero, it will be guessed. ++func AMD64XstateRead(xstateargs []byte, readLegacy bool, regset *AMD64Xstate, xstateZMMHi256Offset int) error { + if _XSAVE_HEADER_START+_XSAVE_HEADER_LEN >= len(xstateargs) { + return nil + } +@@ -120,7 +120,19 @@ + return nil + } + +- avx512state := xstateargs[_XSAVE_AVX512_ZMM_REGION_START:] ++ if xstateZMMHi256Offset == 0 { ++ // Guess ZMM_Hi256 component offset ++ // ref: https://github.com/bminor/binutils-gdb/blob/df89bdf0baf106c3b0a9fae53e4e48607a7f3f87/gdb/i387-tdep.c#L916 ++ if xstate_bv&(1<<9) != 0 && len(xstateargs) == 2440 { ++ // AMD CPUs supporting PKRU ++ xstateZMMHi256Offset = 896 ++ } else { ++ // Intel CPUs supporting AVX512 ++ xstateZMMHi256Offset = 1152 ++ } ++ } ++ ++ avx512state := xstateargs[xstateZMMHi256Offset:] + regset.Avx512State = true + copy(regset.ZmmSpace[:], avx512state[:len(regset.ZmmSpace)]) + +@@ -180,7 +192,7 @@ + // Copy bytes [32, 64) to Xsave area + + zmmval := rest +- zmmpos := _XSAVE_AVX512_ZMM_REGION_START + (n * 32) ++ zmmpos := AMD64XstateZMMHi256Offset() + (n * 32) + if zmmpos >= len(xstate.Xsave) { + return fmt.Errorf("could not set XMM%d: bytes 32..%d not in XSAVE area", n, 32+len(zmmval)) + } +--- a/pkg/proc/amd64util/xsave_amd64.go ++++ b/pkg/proc/amd64util/xsave_amd64.go +@@ -28,3 +28,28 @@ + }) + return xstateMaxSize + } ++ ++var xstateZMMHi256Offset int ++var loadXstateZMMHi256OffsetOnce sync.Once ++ ++// AMD64XstateZMMHi256Offset probes ZMM_Hi256 offset of the current CPU. Beware ++// that core dumps may be generated from a different CPU. ++func AMD64XstateZMMHi256Offset() int { ++ loadXstateZMMHi256OffsetOnce.Do(func() { ++ // See Intel 64 and IA-32 Architecture Software Developer's Manual, Vol. 1 ++ // chapter 13.2 and Vol. 2A CPUID instruction for a description of all the ++ // magic constants. ++ ++ _, _, cx, _ := cpuid(0x01, 0x00) ++ ++ if cx&(1<<26) == 0 { // Vol. 2A, Table 3-10, XSAVE enabled bit check ++ // XSAVE not supported by this processor ++ xstateZMMHi256Offset = 0 ++ return ++ } ++ ++ _, bx, _, _ := cpuid(0x0d, 0x06) // ZMM_Hi256 is component #6 ++ xstateZMMHi256Offset = int(bx) ++ }) ++ return xstateZMMHi256Offset ++} +--- a/pkg/proc/amd64util/xsave_other.go ++++ b/pkg/proc/amd64util/xsave_other.go +@@ -6,3 +6,8 @@ + func AMD64XstateMaxSize() int { + return _XSTATE_MAX_KNOWN_SIZE + } ++ ++func AMD64XstateZMMHi256Offset() int { ++ // AVX-512 not supported ++ return 0 ++} +--- a/pkg/proc/core/linux_core.go ++++ b/pkg/proc/core/linux_core.go +@@ -315,7 +315,7 @@ + case _NT_X86_XSTATE: + if machineType == _EM_X86_64 { + var fpregs amd64util.AMD64Xstate +- if err := amd64util.AMD64XstateRead(desc, true, &fpregs); err != nil { ++ if err := amd64util.AMD64XstateRead(desc, true, &fpregs, 0); err != nil { + return nil, err + } + note.Desc = &fpregs +--- a/pkg/proc/native/ptrace_freebsd_amd64.go ++++ b/pkg/proc/native/ptrace_freebsd_amd64.go +@@ -73,7 +73,7 @@ + if err != nil { + return nil, err + } +- err = amd64util.AMD64XstateRead(regset.Xsave, false, ®set) ++ err = amd64util.AMD64XstateRead(regset.Xsave, false, ®set, amd64util.AMD64XstateZMMHi256Offset()) + return ®set, err + } + +--- a/pkg/proc/native/ptrace_linux_386.go ++++ b/pkg/proc/native/ptrace_linux_386.go +@@ -38,7 +38,7 @@ + } + + regset.Xsave = xstateargs[:iov.Len] +- err = amd64util.AMD64XstateRead(regset.Xsave, false, ®set) ++ err = amd64util.AMD64XstateRead(regset.Xsave, false, ®set, amd64util.AMD64XstateZMMHi256Offset()) + return + } + +--- a/pkg/proc/native/ptrace_linux_amd64.go ++++ b/pkg/proc/native/ptrace_linux_amd64.go +@@ -37,6 +37,6 @@ + } + + regset.Xsave = xstateargs[:iov.Len] +- err = amd64util.AMD64XstateRead(regset.Xsave, false, ®set) ++ err = amd64util.AMD64XstateRead(regset.Xsave, false, ®set, amd64util.AMD64XstateZMMHi256Offset()) + return + } diff -Nru delve-1.20.2/debian/patches/series delve-1.20.2/debian/patches/series --- delve-1.20.2/debian/patches/series 2023-04-07 10:17:37.000000000 +0200 +++ delve-1.20.2/debian/patches/series 2026-07-02 16:00:00.000000000 +0200 @@ -3,3 +3,4 @@ 0003-Skip-TestIssue827.patch 0004-Skip-failed-test-on-arm64.patch 0005-Generate-vmlinux.h.patch +0006-proc-use-CPUID-to-determine-ZMM_Hi256-region-offset.patch
