We did some research work on this for JIT compilers way back at UCI as part of 
my thesis. This was 5 years ago and the architecture world was different, and 
this was focused on x86, but the rough result was that on x86 all that matters 
is scheduling division and memory access. The rest was irrelevant. The hardware 
can see much further ahead in the dynamic instruction stream than you can 
easily do in software, especially when compiling under time pressure (its a 
JIT!). ARM is a different beast and might benefit more, especially at the Ion 
level.

Andreas

On Mar 15, 2013, at 3:20 AM, Ting-Yuan Huang <[email protected]> wrote:

> Hi,
> 
> It seems that there's no instruction scheduler in IonMonkey. If so, may I 
> know why? Modern processors should be benefited a lot by an instruction 
> scheduler. I'd like to know if it is worth doing so before diving in :-)
> 
> Also I didn't see a "formal" (that appears in textbooks) instruction 
> selector, such as tiling a tree/DAG by dynamic programming, or a peephole 
> optimizer. I'm not sure but it seems that the quality of instruction 
> selection relies on the lowering process from MIR to LIR, so that a direct 
> mapping from LIR to assembly codes is efficient enough, right?
> 
> Thanks!
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