Hi,
On 03/15/2013 03:20 AM, Ting-Yuan Huang wrote:
It seems that there's no instruction scheduler in IonMonkey. If so, may I know
why? Modern processors should be benefited a lot by an instruction scheduler.
I'd like to know if it is worth doing so before diving in :-)
Also I didn't see a "formal" (that appears in textbooks) instruction selector,
such as tiling a tree/DAG by dynamic programming, or a peephole optimizer. I'm not sure
but it seems that the quality of instruction selection relies on the lowering process
from MIR to LIR, so that a direct mapping from LIR to assembly codes is efficient enough,
right?
Indeed, our macro assembler is directly writing into the buffer. At the
same time the code that we are producing contains many checks which might
make it hard for assembly optimization to trigger as we need to handle
corner cases such as bailouts.
In IonMonkey case, I think this might be interesting in terms of code-size
and avoiding redundant operations. Like avoiding test operations after ALU
if we are checking if the last computed register is zero, and also to get
rid of scratch register initialization on x64. But I guess this would
mostly be a code-size issue.
In asm.js case (codename OdinMonkey), I think this might be interesting to
test as we are trying to recover the assembly out-of infallible JavaScript
(except on ARM bounds check). I don't know if the quality of the assembly
that we are producing is good enough or not, Luke and Marty might know more
about it.
In case of ARM, I don't know what is the impact of such optimizations.
--
Nicolas B. Pierron
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