Config PFVML2FLT register in ixgbe PMD to enable it receive broadcast and 
multicast packets;
also factorize the common logic with ixgbe_set_pool_rx_mode.

Signed-off-by: Changchun Ouyang <changchun.ouyang at intel.com>
---
 lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 31 +++++++++++++++++++++----------
 lib/librte_pmd_ixgbe/ixgbe_ethdev.h |  1 +
 lib/librte_pmd_ixgbe/ixgbe_rxtx.c   |  6 ++++++
 3 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c 
b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c
index 9c73a30..fb7ed3d 100644
--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c
+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c
@@ -3123,6 +3123,26 @@ ixgbe_uc_all_hash_table_set(struct rte_eth_dev *dev, 
uint8_t on)
        return 0;

 }
+
+uint32_t
+ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val)
+{
+       uint32_t new_val = orig_val;
+
+       if (rx_mask & ETH_VMDQ_ACCEPT_UNTAG)
+               new_val |= IXGBE_VMOLR_AUPE;
+       if (rx_mask & ETH_VMDQ_ACCEPT_HASH_MC)
+               new_val |= IXGBE_VMOLR_ROMPE;
+       if (rx_mask & ETH_VMDQ_ACCEPT_HASH_UC)
+               new_val |= IXGBE_VMOLR_ROPE;
+       if (rx_mask & ETH_VMDQ_ACCEPT_BROADCAST)
+               new_val |= IXGBE_VMOLR_BAM;
+       if (rx_mask & ETH_VMDQ_ACCEPT_MULTICAST)
+               new_val |= IXGBE_VMOLR_MPE;
+
+       return new_val;
+}
+
 static int
 ixgbe_set_pool_rx_mode(struct rte_eth_dev *dev, uint16_t pool,
                               uint16_t rx_mask, uint8_t on)
@@ -3141,16 +3161,7 @@ ixgbe_set_pool_rx_mode(struct rte_eth_dev *dev, uint16_t 
pool,
        if (ixgbe_vmdq_mode_check(hw) < 0)
                return (-ENOTSUP);

-       if (rx_mask & ETH_VMDQ_ACCEPT_UNTAG )
-               val |= IXGBE_VMOLR_AUPE;
-       if (rx_mask & ETH_VMDQ_ACCEPT_HASH_MC )
-               val |= IXGBE_VMOLR_ROMPE;
-       if (rx_mask & ETH_VMDQ_ACCEPT_HASH_UC)
-               val |= IXGBE_VMOLR_ROPE;
-       if (rx_mask & ETH_VMDQ_ACCEPT_BROADCAST)
-               val |= IXGBE_VMOLR_BAM;
-       if (rx_mask & ETH_VMDQ_ACCEPT_MULTICAST)
-               val |= IXGBE_VMOLR_MPE;
+       val = ixgbe_convert_vm_rx_mask_to_val(rx_mask, val);

        if (on)
                vmolr |= val;
diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h 
b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h
index a5159e5..ca99170 100644
--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h
+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h
@@ -340,4 +340,5 @@ void ixgbe_pf_mbx_process(struct rte_eth_dev *eth_dev);

 int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev);

+uint32_t ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val);
 #endif /* _IXGBE_ETHDEV_H_ */
diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c 
b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
index 3a5a8ff..f9b3fe3 100644
--- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
+++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
@@ -3123,6 +3123,7 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev)
        struct ixgbe_hw *hw;
        enum rte_eth_nb_pools num_pools;
        uint32_t mrqc, vt_ctl, vlanctrl;
+       uint32_t vmolr = 0;
        int i;

        PMD_INIT_FUNC_TRACE();
@@ -3145,6 +3146,11 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev)

        IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl);

+       for (i = 0; i < (int)num_pools; i++) {
+               vmolr = ixgbe_convert_vm_rx_mask_to_val(cfg->rx_mode, vmolr);
+               IXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr);
+       }
+
        /* VLNCTRL: enable vlan filtering and allow all vlan tags through */
        vlanctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
        vlanctrl |= IXGBE_VLNCTRL_VFE ; /* enable vlan filters */
-- 
1.8.4.2

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