From: Hemant Agrawal <[email protected]>
fle is already in virtual addressing mode - no need to perform
address conversion for it.
Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Hemant Agrawal <[email protected]>
Acked-by: Akhil Goyal <[email protected]>
---
v2:
- fix 32 bit compilation issue
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 2 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index b09218f27..820759360 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -199,7 +199,7 @@ enum qbman_fd_format {
} while (0)
#define DPAA2_SET_FLE_INTERNAL_JD(fle, len) ((fle)->frc = (0x80000000 | (len)))
#define DPAA2_GET_FLE_ADDR(fle) \
- (uint64_t)((((uint64_t)((fle)->addr_hi)) << 32) + (fle)->addr_lo)
+ (size_t)((((uint64_t)((fle)->addr_hi)) << 32) + (fle)->addr_lo)
#define DPAA2_SET_FLE_ADDR(fle, addr) do { \
(fle)->addr_lo = lower_32_bits((size_t)addr); \
(fle)->addr_hi = upper_32_bits((uint64_t)addr); \
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 58cbce868..56fa969d3 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1261,8 +1261,7 @@ sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t
driver_id)
DPAA2_SEC_ERR("error: non inline buffer");
return NULL;
}
- op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
- DPAA2_GET_FLE_ADDR((fle - 1)));
+ op = (struct rte_crypto_op *)DPAA2_GET_FLE_ADDR((fle - 1));
/* Prefeth op */
src = op->sym->m_src;
--
2.17.0
