On 10/15/2020 1:04 PM, Anatoly Burakov wrote:
From: Liang Ma <liang.j...@intel.com>
Add two new power management intrinsics, and provide an implementation
in eal/x86 based on UMONITOR/UMWAIT instructions. The instructions
are implemented as raw byte opcodes because there is not yet widespread
compiler support for these instructions.
The power management instructions provide an architecture-specific
function to either wait until a specified TSC timestamp is reached, or
optionally wait until either a TSC timestamp is reached or a memory
location is written to. The monitor function also provides an optional
comparison, to avoid sleeping when the expected write has already
happened, and no more writes are expected.
For more details, please refer to Intel(R) 64 and IA-32 Architectures
Software Developer's Manual, Volume 2.
Signed-off-by: Liang Ma <liang.j...@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com>
Acked-by: David Christensen <d...@linux.vnet.ibm.com>
---
Notes:
v7:
- Fix code style and other nitpicks (Konstantin)
v6:
- Add spinlock-enabled version to allow pthread-wait-like
constructs with umwait
- Clarify comments
- Added experimental tags to intrinsics
- Added endianness support
v5:
- Removed return values
- Simplified intrinsics and hardcoded C0.2 state
- Added other arch stubs
Hi Ruifeng,
This is the patch we have talked in today's release status meeting, can you
please check the patch from Arm perspective?
Since the instructions are not supported by Arm I expect it should be OK but it
would be good to get your ack to proceed.
Thanks,
ferruh
