> -----Original Message----- > From: oulijun <ouli...@huawei.com> > Sent: Saturday, January 9, 2021 10:16 AM > To: Ruifeng Wang <ruifeng.w...@arm.com>; Wei Hu (Xavier) > <xavier.hu...@huawei.com>; Min Hu (Connor) <humi...@huawei.com>; > Yisen Zhuang <yisen.zhu...@huawei.com>; Huisong Li > <lihuis...@huawei.com>; Chengchang Tang > <tangchengch...@huawei.com>; Chengwen Feng > <fengcheng...@huawei.com> > Cc: dev@dpdk.org; vladimir.medved...@intel.com; jer...@marvell.com; > hemant.agra...@nxp.com; Honnappa Nagarahalli > <honnappa.nagaraha...@arm.com>; nd <n...@arm.com>; sta...@dpdk.org > Subject: Re: [PATCH v2 2/5] net/hns3: fix build with sve enabled > > > > 在 2021/1/8 16:25, Ruifeng Wang 写道: > > Building with SVE extension enabled stopped with error: > > > > error: ACLE function ‘svwhilelt_b64_s32’ requires ISA extension ‘sve’ > > 18 | #define PG64_256BIT svwhilelt_b64(0, 4) > > > > This is caused by unintentional cflags reset. > > Fixed the issue by appending required flag to cflags instead of > > overriding it. > > > > Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx") > > Cc: xavier.hu...@huawei.com > > Cc: sta...@dpdk.org > > > > Signed-off-by: Ruifeng Wang <ruifeng.w...@arm.com> > > --- > > drivers/net/hns3/meson.build | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/net/hns3/meson.build > > b/drivers/net/hns3/meson.build index 45cee34d9..798086357 100644 > > --- a/drivers/net/hns3/meson.build > > +++ b/drivers/net/hns3/meson.build > > @@ -32,7 +32,7 @@ deps += ['hash'] > > if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64') > > sources += files('hns3_rxtx_vec.c') > > if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' > > - cflags = ['-DCC_SVE_SUPPORT'] > > + cflags += ['-DCC_SVE_SUPPORT'] > Hi > I noticed this patch, but I checked that the hns3 driver did not use this > function.How did you compile it?
Hi, The hns3 driver has sve rx/tx implementation in hns3_rxtx_vec_sve.c. This path will be enabled when compiling with sve feature enabled. I compiled it by using gcc-10.2 with flag '-march=armv8.3-a+sve'. You can try compile for n2 with the cross file added in this series (5/5). Thanks, Ruifeng > > Thanks > Lijun Ou > > sources += files('hns3_rxtx_vec_sve.c') > > endif > > endif > >