The MDIO clock needs to be configured for a specific speed for
x550em. We expected this to be done automatically, but in
the early days of the project this was not happening. We put
code in to do this ourselves.
Eventually, we decided that there is no harm in having SW do
this all the time, so we may not remove this code in the future.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu at intel.com>
---
drivers/net/ixgbe/base/ixgbe_x550.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c
b/drivers/net/ixgbe/base/ixgbe_x550.c
index a7e95d9..c2c0014 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -38,6 +38,7 @@ POSSIBILITY OF SUCH DAMAGE.
#include "ixgbe_common.h"
#include "ixgbe_phy.h"
+STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed
*speed);
/**
* ixgbe_init_ops_X550 - Inits func ptrs and MAC type
@@ -1557,6 +1558,7 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
s32 status;
u32 ctrl = 0;
u32 i;
+ u32 hlreg0;
bool link_up = false;
DEBUGFUNC("ixgbe_reset_hw_X550em");
@@ -1648,6 +1650,12 @@ mac_reset_top:
hw->mac.num_rar_entries = 128;
hw->mac.ops.init_rx_addrs(hw);
+ if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+ /* Config MDIO clock speed. */
+ hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
+ hlreg0 &= ~IXGBE_HLREG0_MDCSPD;
+ IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
+ }
if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)
ixgbe_setup_mux_ctl(hw);
--
1.9.3
