On Mon, 22 Jun 2015 11:58:32 -0700 Cyril Chemparathy <cchemparathy at ezchip.com> wrote:
> This series adds support for the EZchip TILE-Gx family of SoCs. The > architecture port in itself is fairly straight forward due to its > reliance on generics for the most part. > > In addition to adding TILE-Gx architecture specific code, this series > includes a few cross-platform fixes for DPDK (cpuflags, SSE related, > etc.), as well as minor extensions to to accomodate a wider range of > hugepage sizes and configurable mempool element alignment boundaries. > > Changes in this series: > v2: Removed RTE_LIBNAME per Thomas' feedback. > [...] Thomas, Any feedback on this series? Thanks -- Cyril.
