[PATCH v2 02/20] net/ice/base: add NAC Topology device capability parser

[Qiming Yang]

Define and add parsing support for new device capability
ICE_AQC_CAPS_NAC_TOPOLOGY.

Signed-off-by: Grzegorz Nitka <grzegorz.ni...@intel.com>
Signed-off-by: Qiming Yang <qiming.y...@intel.com>
---
 drivers/net/ice/base/ice_common.c | 26 ++++++++++++++++++++++++++
 drivers/net/ice/base/ice_type.h   | 10 ++++++++++
 2 files changed, 36 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c 
b/drivers/net/ice/base/ice_common.c
index fa30c50ca1..ede46820cd 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2807,6 +2807,29 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct 
ice_hw_dev_caps *dev_p,
                  dev_p->num_flow_director_fltr);
 }
 
+/**
+ * ice_parse_nac_topo_dev_caps - Parse ICE_AQC_CAPS_NAC_TOPOLOGY cap
+ * @hw: pointer to the HW struct
+ * @dev_p: pointer to device capabilities structure
+ * @cap: capability element to parse
+ *
+ * Parse ICE_AQC_CAPS_NAC_TOPOLOGY for device capabilities.
+ */
+static void
+ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
+                           struct ice_aqc_list_caps_elem *cap)
+{
+       dev_p->nac_topo.mode = LE32_TO_CPU(cap->number);
+       dev_p->nac_topo.id = LE32_TO_CPU(cap->phys_id) & ICE_NAC_TOPO_ID_M;
+
+       ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_primary = %d\n",
+                 !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M));
+       ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n",
+                 !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M));
+       ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %d\n",
+                 dev_p->nac_topo.id);
+}
+
 /**
  * ice_parse_dev_caps - Parse device capabilities
  * @hw: pointer to the HW struct
@@ -2852,6 +2875,9 @@ ice_parse_dev_caps(struct ice_hw *hw, struct 
ice_hw_dev_caps *dev_p,
                case  ICE_AQC_CAPS_FD:
                        ice_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]);
                        break;
+               case ICE_AQC_CAPS_NAC_TOPOLOGY:
+                       ice_parse_nac_topo_dev_caps(hw, dev_p, &cap_resp[i]);
+                       break;
                default:
                        /* Don't list common capabilities as unknown */
                        if (!found)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index da813c8307..c653c1de3e 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -693,6 +693,15 @@ struct ice_ts_dev_info {
        u8 ts_ll_read : 1;
 };
 
+#define ICE_NAC_TOPO_PRIMARY_M BIT(0)
+#define ICE_NAC_TOPO_DUAL_M    BIT(1)
+#define ICE_NAC_TOPO_ID_M      MAKEMASK(0xf, 0)
+
+struct ice_nac_topology {
+       u32 mode;
+       u8 id;
+};
+
 /* Function specific capabilities */
 struct ice_hw_func_caps {
        struct ice_hw_common_caps common_cap;
@@ -709,6 +718,7 @@ struct ice_hw_dev_caps {
        u32 num_flow_director_fltr;     /* Number of FD filters available */
        struct ice_ts_dev_info ts_dev_info;
        u32 num_funcs;
+       struct ice_nac_topology nac_topo;
 };
 
 /* Information about MAC such as address, etc... */
-- 
2.25.1