Hi all, I’ve been working on an Allwinner D1 / XuanTie C906 using the Sipeed Lichee RV / 86 Panel and recently completed a local NuttX board port and a comparison against Linux and RT-Thread RT-Smart on the same hardware.
I thought some of the bring-up findings might be useful to the NuttX community. The tested NuttX version was 13.0.1-RC0, initially brought up in FLAT S-mode under the existing OpenSBI/U-Boot environment. The first image reached NSH quite quickly, but then reset after roughly 20 seconds. The cause was inherited hardware state: U-Boot had left the Allwinner watchdog enabled, so NuttX booted successfully while carrying a guaranteed reset condition. After disabling the watchdog, timed sleeps still failed. OpenSBI advertised the SBI TIME extension and set_timer returned success, but the supervisor timer pending interrupt never appeared through STIP on the tested firmware path. I therefore moved the NuttX scheduler tick onto the native Allwinner D1 Timer1 peripheral through the PLIC. That exposed a second problem. With OSC24M as the clock source I originally programmed an interval of 24,000 for a nominal 1 ms scheduler tick. On the physical D1 this produced an effective period of 24,001 input clocks. The resulting error was only about 41.7 ppm, but over a ~20 second benchmark it accumulated to nearly 0.84 ms. Programming 23,999 produced the intended 24,000 input clocks per tick and reduced the measured clock-domain drift to essentially zero. After correcting the timer and tightening the measurement methodology, the loaded 1 ms periodic test produced: p50: 0.542 us p99: 0.583 us p99.9: 0.708 us max: 0.708 us missed: 0 / 20,000 The periodic task was FIFO120 and the continuous compute worker FIFO90 on the single C906 core. An important caveat is that this was a FLAT shared-address-space NuttX configuration. I am not presenting those numbers as equivalent to Linux protected-process overhead. I documented the watchdog diagnosis, SBI timer path, Timer1 implementation, phase-alignment methodology and failed intermediate tests here: GitHub: https://github.com/lanceharvie/allwinner-d1-os-benchmark Report: https://doi.org/10.5281/zenodo.22054539 I’d be interested in feedback from the NuttX maintainers on two things: 1. whether there is interest in taking the D1 board-port work further toward upstream quality, and 2. whether anyone has seen a similar D1/OpenSBI situation where SBI TIME accepts set_timer but STIP never becomes pending. Regards, Lance Harvie
