Hi,

> > But the serialized SMBASE programming still happens, now in the PEI
> > module, and I don't see a good reason why the runtime the new PEI module
> > and the runtime of PiSmmCpuDxeSmm combined is faster than before.
> 
> As I said, PEI module can also programs SMBASE in parallel, for
> example program the some register directly instead of depending the
> existing RSM instruction to reload the SMBASE register with the new
> allocated SMBASE each time when it exits SMM.

Ok.  So new Intel processors apparently got new MSR(s) to set SMBASE
directly.  Any specific reason why you don't add support for that to
PiSmmCpuDxeSmm?  That would avoid needing the new HOB (and the related
problems with the 8190 cpu limit) in the first place.

> Different vender might
> has different implementation.

Yes.

We can have different implementations in PiSmmCpuDxeSmm and/or
SmmCpuFeaturesLib to handle that.

> Another benefit with this series will make the smbase relocation more
> independent & more simple compared with existing process in smm cpu
> driver. 

Maybe it is.  Hard to justify from outside if you are not willing to
show the code of the PEI module.

> > Do you intent submitting code for OVMF producing such a HOB?
> > There isn't any in this series.
> 
> No, we won't do that. 

Then there is no point in changing the OVMF code,
other than maybe adding an ASSERT that there is no such HOB.

> > How is the SMM initialization of hotplugged CPUs
> > supposed to work with the new mode of operation?
> 
> Yes, that's already considered. For hot plugged CPU supported, the max
> number of CPUs should be defined in the
> PcdCpuMaxLogicalProcessorNumber, and all CPU Hot Plug Data is recorded
> in the PcdCpuHotPlugDataAddress, which contains the smbase info
> pre-allocated in the hob (filling the value in pi smm cpu driver),
> then CPU Hotplug MMI handler will relocate the SMBASE for new CPUs.

So that keeps the old workflow.

take care,
  Gerd



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