Xiangfu Liu wrote:
> sorry. not clear about this. the origin is '1', it changed from '1' --> '0'

Ah, much better :-) This would then be consistent with a power
sequencing problem, e.g., if the FPGA core goes down faster
than the NOR.

Another explanation could be a communication problem between NOR
and the FPGA (excessive clock speed, signal integrity issues,
incorrect sequencing of control signals, etc.)

> I am try to [power cycle] --> [rending 30 seconds] --> [power cycle] in my m1
> it failure at 7 times.

Okay, then it's almost certainly a real NOR corruption.

Do you remember what the M1 was doing when you powered it down
the last time before the NOR got corrupted ? And was that task
accessing the NOR in any way ?

Thanks,
- Werner
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