Hi, current newest draft R4 is: http://downloads.qi-hardware.com/hardware/milkymist_one/sch/tmp/20120120/Milkymist%20One%20R4%20-%2020120120.pdf
1). Audio.SchDoc, based on previous post below; http://lists.milkymist.org/pipermail/devel-milkymist.org/2012-January/002583.html - downsize pins J3(DNP) with LNLVLOUT_L, AUDIO_AGND, LNLVLOUT_R. - added J23(DNP) with CD_L, CD_GND, CD_R. - changed and DNP C23/C25 to unpolarized 10 uF - changed R14/R15/R16 to C273/C274/C275 47 pF - removed C24 - removed parts of AUX* and VIDEO* input paths: R2 ~ R9, to keep DC block footprints(C4/C5/C7/C8), TPs added for soldering purposes. - removed R22/R25, added one TP for C14 - removed C17/R19, added one TP for C22 - changed R23/R24 to C276/C277 47 pF - changed C19/C21/C22 to 10 uF - removed C15/C16/C26/C27 - replaced L1/L3 with wire - removed SPDIF_{OUT, ENABLE} net - for those 47 pF paths, if found Zener with suitable capacitance, then will add and remove those 47 pF. 2). DVI-ISingle.SchDoc - changed J17 from VGA D-SUB connector to DVI-I (single channel) analog & digital connector, the candidates could be picked, a p/n with 74320-1004 from Molex we temporarily drew for it, like Werner mentioned in: http://lists.milkymist.org/pipermail/devel-milkymist.org/2012-January/002622.html it's still opening to discuss and influence board size of expansion board, etc. - kept all parts same as in revision 3 - added 4 * differential pairs from fpga bank 2 - undetermined on if using 'hot plug detect' pin16, to be considered and well-known its background knowledge. 3). FPGA.SchDoc * reset circuit: - changed U24 to APX803-40SAG-7, 4.0V reset chip. - added U25 74AUP1G08GW, AND gate. see ref. : http://en.qi-hardware.com/wiki/Milkymist_One_RC3_Known_Issues#Proposed_pre-rc4_reset_schematic * constructed a U-Shaped though J21/J22 sockets for expansion board proposed by Werner: - kept J21 pins's assignments to get compatibility for R2/R3 version - added J22 to provide more fpga pins for external use - adding protection mechanism (over-current, reversed plug, voltage-clamping protection on each fpga pins) has not been implemented yet while an unexpected failure happens on expansion board. - determine the limited area about part's height of bottom side of expansion board, and also replacing more flatter Y1 with less height and considering C240, if needs to move U8 IR receiver or how to let not collide expansion board. * version control - removed R179 and HW_VER_3 net. - moved HW_VER_[0:2] to bank3 4). Misc.SchDoc * LEDs multiplexing matrix proposed by Werner: http://en.qi-hardware.com/mmlogs/milkymist_2012-01-19.log.html#t09:57 - added LED_ROW[0:2] and LED_COL[0:2], leds D4~21, shown in red color; they will be placed near to connectors. The value of R200 ~ 202 is to be defined. Regarding to reserve how many quantities of LED and existing D1 ~ 3 is under discussing. Those are for connectors now: DMX TX/RX, MIDI TX/RX, IR, DVI-I, LINE IN/OUT, VIDEO-IN R/G/B, MEMORY CARD, USB A~F, didn't include MIC now. - regards to let D1 pocessed overriding control by s/w possibility which is a good idea, we may apply this later. 5). NORFlash.SchDoc - added pull-up R183/R184 4.7K ohm for flash chip pin14 CE0/pin 55 WE# 6). USBExtPorts1/USBExtPorts2/USBIntPorts.SchDoc: total 4 external usb ports(with stacked right angle connectors) + 2 internal usb ports (with one housing) - changed current J16/J17 right angle type usb connector to: http://www.molex.com/pdm_docs/sd/672984090_sd.pdf - added circuit of usb power switch U26 to control usb A/B ports, p/n: AP2142ASG-13; http://en.qi-hardware.com/wiki/Milkymist_One_RC3_Known_Issues#add_USB_Power_Switch - same idea to add 2nd usb C/D ports and internal usb E/F ports, so assigned few control and flag pins below -- USB[A:D]PWR_EN_N, USB[A:D]PWR_FLG -- USB[C:F]_SPD, USB[C:F]_OE_N, USB[C:F]_RCV, USB[C:F]_VP, USB[C:F]_VM - reserved R168/R169 DNP footprints to if one wants to set ports as slave possibility but no more in port C~F. - capacitance of polarized C259/C260/C267/C269 now is marked still 120 uF(which is same as datasheet's said) not 100 uF we experimented already. Will determine this later. - to keep repairing goal, test points are still added in port C~F; as long as house think a jam-packed case then I just keep one set of test points from A port. - there's a fact that SW1 ~ 3 must be extruded together to save space for 6 ports nearby to mechanical hole J15. - R139/C177 network keeps for J16/J20/J24 as protection. - F2 PTC part needs to be detemined a new p/n for adapting whole consumption protection. 7). VideoIn.SchDoc - changed U21 to ADV7181CBSTZ - replaced L19 with wire, this connection will be placed under U21 - removed C202 ~ C207 entirely - replaced L14 ~ L16 with wire 8). other SchDoc files don't describe since they are not updated. design files: http://downloads.qi-hardware.com/hardware/milkymist_one/sch/tmp/20120120/r4_design.tar.bz2 If missed items, let me know, Comments are welcome. :-) - adam
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