Yann Sionneau <y...@minet.net> schrieb:
>Le 09/07/12 18:28, Michael Walle a écrit : >> >> Yann Sionneau <y...@minet.net> schrieb: >> >>> Hey, >>> >>> Michael Walle asked me to publish a documentation of Milkymist MMU >in >>> order for him to study the feasibility of implementing a model for >this >>> MMU in QEmu. >>> Documenting is always something one needs to do at some point, so >here >>> it is, written very quickly in a small text file. >>> >>> I hope it is clear enough, if you have any question: do not hesitate >to >>> ask me :) >>> This is not a complete documentation, it does not say anything yet >>> about >>> generated exceptions/TLB miss/page fault etc. >> thanks. still missing: >> - csr numbers >> - how to enable and disable the mmu >I updated the wiki documentation with the following information: > >CSR ids (used in LM32 opcodes): > > * TLBCTRL: 0x1C > * TLBVADDR (and DTLBMA): 0x1D > * TLBPADDR (and ITLBMA): 0x1E > > >Enabling the ITLB: > >mvi r1, 0x8 >wcsr TLBCTRL, r1 > >Enabling the DTLB: > >mvi r1, 0x9 >wcsr TLBCTRL, r1 > and how do disable it again? -- Michael _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode
