On Sunday, January 06, 2013 06:49:46 AM Troy Benjegerdes wrote:
> I think I got most of this, but I appear to have gone the wrong
> direction with the multiple phases. I thought I could remove the
> 'p1' signals, but this seems broken.

Since you are still multiplying the SDRAM clock for commands by 2, you still 
have the 2 phases p0 and p1. You only need to touch the data serialization 
ratio (e.g. replace 1:4 IOSERDES with IODDR). The command path stays the same.

> with:
> https://bitbucket.org/dahozer/xulamist/commits/b6343bdc8613f1ea1723e04c6bb7
> e17056db4ad8

Your tREFI is wrong - 64ms is for a single row, but there are lots of them in 
a SDRAM.

Sebastien
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