On 06/13/2012 12:34 AM, Thierry Reding wrote: > * Stephen Warren wrote: ... >> I think you also need a property to specify the exact port >> layout; the Tegra20 controller supports: >> >> 1 x4 port 2 x2 ports (you can choose to use only 1 of these I >> assume) >> >> So just because only 1 of the ports is enabled, doesn't imply >> it's x4; it could still be x2. >> >> Tegra30 has more options. > > Both the upstream and downstream drivers currently hard-code this > to dual and 411 (I assume that means 1x4, 2x1?) configurations for > Tegra20 and Tegra30 respectively. Unfortunately the register > AFI_PCIE_CONFIG isn't documented on Tegra20 at all and for Tegra30 > lists only the valid configurations (see 28.4.1.5 PCIe CONFIG) but > not the corresponding encodings. > > Maybe a good name for the new property would be "num-lanes". I also > wonder if this property would be better off in the parent node, > which would make it easier to check for valid configurations. > Otherwise the code would have to collect the settings of all the > ports and check if the combination is valid. Then again, having > num-lanes in the parent with one cell for each controller isn't > very nice if each controller can be individually disabled.
Indeed, since the register that controls this is in the main register set rather than the per-port register set, it does seem like a good idea to put the property in the main node, not the per-port node. _______________________________________________ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss