From: Thor Thayer <ttha...@opensource.altera.com>
Add 2 SPI nodes to SOCFPGA device tree.
Signed-off-by: Thor Thayer <ttha...@opensource.altera.com>
---
v2: Remove extra files. Move SPIDEV into board specific file.
v3: Remove dts file since SPIDEV is not allowed.
---
arch/arm/boot/dts/socfpga.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 4d77ad6..d81bc2d3 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -628,6 +628,30 @@
clock-names = "biu", "ciu";
};
+ spi0: spi@fff00000 {
+ compatible = "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 154 4>;
+ num-cs = <4>;
+ bus-num = <0>;
+ clocks = <&spi_m_clk>;
+ status = "disabled";
+ };
+
+ spi1: spi@fff01000 {
+ compatible = "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff01000 0x1000>;
+ interrupts = <0 156 4>;
+ num-cs = <4>;
+ bus-num = <1>;
+ clocks = <&spi_m_clk>;
+ status = "disabled";
+ };
+
/* Local timer */
timer@fffec600 {
compatible = "arm,cortex-a9-twd-timer";
--
1.7.9.5
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