Hi Vince,

On Wed, Mar 25, 2009 at 12:57 AM, vince <vi...@bluush.com> wrote:

> Ive change my benchmark to invalidate the cache before every test. My
> result are the same. Attached is my test program.

No worries - just wanted to make sure we weren't missing the obvious!

Might also be worth shuffling the sequencing of the tests (armasm,
armasm2, libc), see if that has any impact.  I'm not intimate with ARM
cache details, but with a write-back cache you could be stalling on
cacheline evictions later in the test.

Another safety would be to perform the tests in different memory
regions, with a complete cache flush and invalidate between each run.

Not saying there's anything wrong with your code, just know its easy
to get false results from simple benchmark code. Memory tests are
another one where the obvious approach is often wrong.

Cheers,

John
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