On Thu, May 26, 2005 at 04:41:17PM -0700, Matt Ettus wrote: > > > Even if you set the frequency to 0, there is a "random" initial phase > > that is unknown, and thus you cannot separate the two channels. > > The initial phase is always 0 at power up. If you never set the > frequency to something other than 0, it will always stay that way. Its > a simple change to make the phase go back to zero. Patches welcome... > > Matt
A couple of hints: You'll need a bit in an FPGA register to control the resetting to zero. Edit usrp/firmware/include/fpga_regs_standard.h and add // Reset phase accumulator to zero for those with bits set. // E.g., writing a 0x000f resets them all. Writing 0x0001 resets // the phase accumulator associated with DDC 0. #define FR_PHI_RESET 44 Doing a make in usrp/firmware/include will generate fpga_regs_standard.v from fpga_regs_standard.h Then look at these files to figure out the rest: usrp/fpga/sdr_lib/serial_io.v usrp/fpga/toplevel/usrp_std/usrp_std.v Eric _______________________________________________ Discuss-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
