Hi,
I am using the USRP and TV_RX in slot B to capture over the air signals. I
understand the receive chain processing inside of the FPGA and was trying to
get the complex 16-bit I and Q samples out at the debug IO pins. As a dry
run I tried connecting 12-bit the rx_a_b input to the debug IO pins and
could do so successfully by enabling appropriate registers and modifying
usrp_std.v. However, in the usrp_std.v I am unable to pinpoint the signals
that carry I and Q channels that come out of the receive chain. I tried
routing the bb_rx_i0 and bb_rx_q0 signals that come out of the rx_chain_0
block. Since I am running 1rx and 1tx configuration only rx_chain_0 is
enabled, I guess. However I do not see any outputs when I connect these
signals to the debug pins using debug_0(bb_rx_q0),.debug_1(bb_rx_i0). I have
a Basic RX and Basic TX in A slots to look at the outputs. I also tried
routing the signals labeled ch0rx, ch1rx to debug pins but still no outputs.
Then in my desperation I tried routing the rest of ch2rx to ch7rx to debug
pins with a new rbf file everytime but still no outputs. I could verify that
the ddc0_in_i signals are toggling but the bb_rx_i0 and bb_rx_q0 do not seem
to toggle. I would like to look at individual I Q signals and then
eventually connect the interleaved I and Q that go to the USB.
Any help/guidelines appreciated.
Thanks,
Nirali Patel
assign ch0rx = counter ? debug_counter : loopback ? loopback_i_0 :
bb_rx_i0;
assign ch1rx = counter ? debug_counter + 16'd1 : loopback ? loopback_q_0
: bb_rx_q0;
assign ch2rx = bb_rx_i1;
assign ch3rx = bb_rx_q1;
assign ch4rx = bb_rx_i2;
assign ch5rx = bb_rx_q2;
assign ch6rx = bb_rx_i3;
assign ch7rx = bb_rx_q3;
wire [15:0]
ddc0_in_i,ddc0_in_q,ddc1_in_i,ddc1_in_q,ddc2_in_i,ddc2_in_q,ddc3_in_i,ddc3_i
n_q;
wire [31:0] rssi_0,rssi_1,rssi_2,rssi_3;
adc_interface
adc_interface(.clock(clk64),.reset(rx_dsp_reset),.enable(1'b1),
.serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_st
robe),
.rx_a_a(rx_a_a),.rx_b_a(rx_b_a),.rx_a_b(rx_a_b),.rx_b_b(rx_b_b),
.rssi_0(rssi_0),.rssi_1(rssi_1),.rssi_2(rssi_2),.rssi_3(rssi_3),
.ddc0_in_i(ddc0_in_i),.ddc0_in_q(ddc0_in_q),
.ddc1_in_i(ddc1_in_i),.ddc1_in_q(ddc1_in_q),
.ddc2_in_i(ddc2_in_i),.ddc2_in_q(ddc2_in_q),
.ddc3_in_i(ddc3_in_i),.ddc3_in_q(ddc3_in_q),.rx_numchan(rx_numchan) );
`ifdef RX_EN_0
rx_chain #(`FR_RX_FREQ_0,`FR_RX_PHASE_0) rx_chain_0
( .clock(clk64),.reset(1'b0),.enable(enable_rx),
.decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(s
trobe_decim),.hb_strobe(hb_strobe),
.serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_st
robe),
.i_in(ddc0_in_i),.q_in(ddc0_in_q),.i_out(bb_rx_i0),.q_out(bb_rx_q0),.debugda
ta(debugdata),.debugctrl(debugctrl));
`else
assign bb_rx_i0=16'd0;
assign bb_rx_q0=16'd0;
`endif
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