Hi, i'm watching all discussion about poor students and the evil Mr
Ettus who don't play like Santa Claus and whant to make some profit
:). I'm also watching all topics and discussion regarding a low cost
solution for use with GNURADIO. I guess we can have a cheap option to
us and I'm
I don't think anyone *seriously* thinks Matt is evil for wanting to make
a profit from his hard labour. That makes as much sense as insisting
that Henry Ford should have produced cars at materials cost, and his
labour force should have worked for free, "for the greater good".
The fact is that Henry Ford contributed to "the greater good" *while*
making a significant profit, and giving his workers a living wage, etc, etc.
OMG, did I just compare Matt to Henry Ford? Hmmmmm. :-) :-)
But, I think the question "is there an approach to higher-bandwidth Gnu
Radio compatible hardware that is simpler (and thus hopefully
cheaper) than what is currently on the market, and can we reasonably
totally-open-source the result" is a reasonable one.
very interested in work in such a solution. What I'm suggeting here is
to take all people who want's to take the job and start a small
project. I'm a embedded systems enthusiatic and was a "starving
student", now I'm a starving engineer, since I'm unemployed, that have
some time to work on this project. The first question is: Ok, we need
a low cost solution with some possible applications but what are the
limits?
Well, I posted a first-cut, potential block-diagram for the Rx side
earlier today:
http://www.srbac.org/files/digital_receiver2.pdf
It covers a goodly swath of the bands of interest for hobbiests
(68.75MHz to 2.2GHz). One could substitute a different
PLL synthesizer to cover different bands of interest. In fact, if
one added another level of output divider
on the output of the ADF4350, one could go down to lower frequencies.
Hmmm. Thinkage. Looking at the datasheet
for the AD5387, the part is only specced to go down to 50MHz, but
looking at the plots, it will likely
go down much lower (perhaps as low as 5MHz). So adding another
configurable, bypassable, divider stage
on the output of the ADF4350 yields lower-frequency (in the HF bands)
capability, and still provides coverage up to 2.2GHz.
Actually, a single, fixed divider that is bypassable might give the
required coverage, for example, a single /16 or something.
Have to play with the numbers.
It will handle up to 20Msps, in 4 discrete steps (2.5Msps, 5Msps,
10Msps, 20Msps).
It specifies a generic FMC connector, so you could use it with an FPGA
board that uses the FMC
(FPGA Mezzanine Connector).
FPGA evaluation boards are available *relatively* cheaply, since I think
folks like Xilinx sell them
through distributors as "loss leaders" to get you into the mood to
design-in their technology
to mass-market devices. But hey, if the Open Source community wants
to leverage that little
bit of market anomaly, that's just fine :-)
The approach is to combine the RF front-end with a modestly-capable ADC,
and use the ADC output as the "demarc" point where
you plug it into some kind of FPGA+GiGe motherboard (like the Xilinx
eval boards), or perhaps an EZ-FX2 type board giving a USB-2.0
interface. The USB board would be the cheaper way of getting data
out to the PC, with some provisos, like it won't do DDC, so you're
limited to whatever reasonable frequency resolution you can get out
of the PLL synthesizer. With an FPGA board, you'll likely be able
to do a DDC.
Perhaps somebody wants to work on a comparable block-diagram for the Tx
side? With roughly-comparable capabilities? One might make
simplifying assumptions, like ADC and DAC clock rates are always
common, which implies that the analog baseband filter selection would
be common, etc, etc.
The FMC connector standard apparently provides for 68 signal paths.
That should be plenty.
--
Marcus Leech
Principal Investigator
Shirleys Bay Radio Astronomy Consortium
http://www.sbrac.org
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