Hi Josh,

I am just wondering how the USRP performs the 8 bit mapping for I & Q
samples. The ADC & DAC have 12 - 14 bit precision, I think. When I select
the sc8 wire format, does the USRP divide the entire received signal range
into 2^8 sectors and uses one number to represent each of those?

Thanks,

Nazmul

On Sun, Jul 22, 2012 at 4:22 PM, Josh Blum <j...@ettus.com> wrote:

>
>
> On 07/22/2012 01:14 PM, Nazmul Islam wrote:
> > Hello,
> >
> >  I am trying to use the complex int16 option of the UHD (source/sink)
> > blocks in my GRC generated python codes. I am doing wide band spectral
> > analysis in my experiments. Therefore, 50 MS/s will be very helpful for
> me.
> >
>
> The host format and the wire format are totally independent options
> here. Both of these properties also configurable properties in the GRC
> USRP source/sink blocks.
>
> * You need to set the wire format to sc8 (thats 2 bytes per complex
> sample) to achieve 50 Msps over gigabit ethernet.
>
> * The desired host format does not have to change. fc32 (complex floats)
> is a perfectly valid setting
>
> -josh
>
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-- 
Muhammad Nazmul Islam

Graduate Student
Electrical & Computer Engineering
Wireless Information & Networking Laboratory
Rutgers, USA.
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