On Tue, Jul 30, 2013 at 3:41 PM, Marcus D. Leech <mle...@ripnet.com> wrote:
> On 07/30/2013 03:35 PM, Kristoff Bonne wrote: > >> Tom, >> >> >> (inline comments) >> >> >> My understanding was that all IEEE floating-point implementations > followed the same rounding rules, etc? Is that not the case? > > Are the SIMD subsystems not IEEE compliant, for performance reasons? > > Marcus, (Forgive my ignoring the context of the parent discussion to answer your question): I can tell you that in the case of ARM at least NEON instructions are is *not* IEEE-754 compliant. One optimization in particular that I can recall off the top of my head is that denormalized floats are flushed to zero (i.e. *extremely* small values get interpreted as zeros). I can't speak to whether this is actually an issue for any given application, but ARM specifically notes that NEON instructions are not IEEE compliant, and that therefore users should aware of potential issues. They also point out other non-compliant bits in their TRM's (e.g. for the Cortex-A9: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0409e/CIHEJAGA.html). I'll note that most versions of GCC do not emit NEON instructions for floating point math unless you pass set -funsafe-math-optimizations (see http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html#index-mfpu-1143). Of course that statement doesn't apply to hand assembly (or intrinsics). Doug -- Doug Geiger doug.gei...@bioradiation.net
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