From: Jeff McGee <jeff.mc...@intel.com> The motivation for this change is that fusing can be used to create multiple slice, subslice, and EU configuration within the same PCI ID. CHV is the first such device to do this and thus make an ID-based lookup table approach unreliable. The best solution is for the kernel to determine the precise config from fuse registers and share the required information with userspace. Moving to this approach has the added benefit of reducing the number of static parameters that userspace must maintain for current and future devices.
The associated kernel patch has been posted to intel-gfx list (no archive link yet). I'm trying to collect feedback from userspace which I hope will be interested in adopting some form of this interface. I am starting with these 4 attributes, but we can add or remove them according to the userspace needs. Please provide any comments. Thanks Jeff McGee (1): intel: Export GT config attributes include/drm/i915_drm.h | 4 +++ intel/intel_bufmgr.h | 5 ++++ intel/intel_bufmgr_gem.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 72 insertions(+) -- 2.2.0