After this patch the register check loop does the same thing as before,
except that now gcc does better job optimizing it: it now sees that
end_reg was already checked against PACKET3_SET_CONTEXT_REG_END and can
optimize REG_SAFE_BM_SIZE comparison out of evergreen_is_safe_reg()
as (PACKET3_SET_CONTEXT_REG_END >> 7) < REG_SAFE_BM_SIZE.
Signed-off-by: Grazvydas Ignotas <notasas at gmail.com>
---
drivers/gpu/drm/radeon/evergreen_cs.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c
b/drivers/gpu/drm/radeon/evergreen_cs.c
index 4453799..e31076e 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -2299,11 +2299,10 @@ static int evergreen_packet3_check(struct
radeon_cs_parser *p,
DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
return -EINVAL;
}
- for (i = 0; i < pkt->count; i++) {
- reg = start_reg + (4 * i);
+ for (reg = start_reg, idx++; reg <= end_reg; reg += 4, idx++) {
if (evergreen_is_safe_reg(p, reg))
continue;
- r = evergreen_cs_handle_reg(p, reg, idx + 1 + i);
+ r = evergreen_cs_handle_reg(p, reg, idx);
if (r)
return r;
}
@@ -2317,11 +2316,10 @@ static int evergreen_packet3_check(struct
radeon_cs_parser *p,
DRM_ERROR("bad PACKET3_SET_CONTEXT_REG\n");
return -EINVAL;
}
- for (i = 0; i < pkt->count; i++) {
- reg = start_reg + (4 * i);
+ for (reg = start_reg, idx++; reg <= end_reg; reg += 4, idx++) {
if (evergreen_is_safe_reg(p, reg))
continue;
- r = evergreen_cs_handle_reg(p, reg, idx + 1 + i);
+ r = evergreen_cs_handle_reg(p, reg, idx);
if (r)
return r;
}
--
1.9.1
