Am 21.01.2015 um 09:36 schrieb Michel Dänzer:
> From: Michel Dänzer <michel.daenzer at amd.com>
>
> The GART table BO has to be moved out of VRAM for suspend/resume. Any
> updates to the GART table during that time were silently dropped without
> this change. This caused GPU lockups on resume in some cases, see the bug
> reports referenced below.
>
> This might also make GPU reset more robust in some cases, as we no longer
> rely on the GART table in VRAM being preserved across the GPU
> lockup/reset.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85204
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86267
> Cc: stable at vger.kernel.org
> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
Can we make that directly part of radeon_gart_table_vram_pin? Doesn't
seem to make sense to always need to call both functions.
Additional to that couldn't we just stop mapping/unmapping the BO in
radeon_gart_table_vram_pin? As far as I know CPU mapped BOs can still
move around.
Christian.
> ---
> drivers/gpu/drm/radeon/cik.c | 1 +
> drivers/gpu/drm/radeon/evergreen.c | 1 +
> drivers/gpu/drm/radeon/ni.c | 1 +
> drivers/gpu/drm/radeon/r300.c | 1 +
> drivers/gpu/drm/radeon/r600.c | 1 +
> drivers/gpu/drm/radeon/radeon.h | 1 +
> drivers/gpu/drm/radeon/radeon_gart.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/radeon/rs600.c | 1 +
> drivers/gpu/drm/radeon/rv770.c | 1 +
> drivers/gpu/drm/radeon/si.c | 1 +
> 10 files changed, 31 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 64fdae5..8870d51 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -5729,6 +5729,7 @@ static int cik_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
> (0xA << 7) |
> diff --git a/drivers/gpu/drm/radeon/evergreen.c
> b/drivers/gpu/drm/radeon/evergreen.c
> index 85995b4..ffa4d6c3 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2426,6 +2426,7 @@ static int evergreen_pcie_gart_enable(struct
> radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
> diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
> index 360de9f..92f488d 100644
> --- a/drivers/gpu/drm/radeon/ni.c
> +++ b/drivers/gpu/drm/radeon/ni.c
> @@ -1229,6 +1229,7 @@ static int cayman_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
> (0xA << 7) |
> diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
> index 08d68f3..ef05569 100644
> --- a/drivers/gpu/drm/radeon/r300.c
> +++ b/drivers/gpu/drm/radeon/r300.c
> @@ -132,6 +132,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* discard memory request outside of configured range */
> tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
> WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index ef5d606..049a571 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -1056,6 +1056,7 @@ static int r600_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
>
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 40c4c7a..6e9e5ef 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -664,6 +664,7 @@ void radeon_gart_unbind(struct radeon_device *rdev,
> unsigned offset,
> int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
> int pages, struct page **pagelist,
> dma_addr_t *dma_addr, uint32_t flags);
> +void radeon_gart_restore(struct radeon_device *rdev);
>
>
> /*
> diff --git a/drivers/gpu/drm/radeon/radeon_gart.c
> b/drivers/gpu/drm/radeon/radeon_gart.c
> index a530932..556270d 100644
> --- a/drivers/gpu/drm/radeon/radeon_gart.c
> +++ b/drivers/gpu/drm/radeon/radeon_gart.c
> @@ -301,6 +301,28 @@ int radeon_gart_bind(struct radeon_device *rdev,
> unsigned offset,
> }
>
> /**
> + * radeon_gart_restore - bind all pages in the gart page table
> + *
> + * @rdev: radeon_device pointer
> + *
> + * Binds all pages in the gart page table (all asics).
> + * Used to rebuild the gart table on device startup or resume.
> + */
> +void radeon_gart_restore(struct radeon_device *rdev)
> +{
> + int i;
> +
> + if (!rdev->gart.ptr) {
> + return;
> + }
> + for (i = 0; i < rdev->gart.num_gpu_pages; i++) {
> + radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i]);
> + }
> + mb();
> + radeon_gart_tlb_flush(rdev);
> +}
> +
> +/**
> * radeon_gart_init - init the driver info for managing the gart
> *
> * @rdev: radeon_device pointer
> diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
> index 74bce91..17b7868 100644
> --- a/drivers/gpu/drm/radeon/rs600.c
> +++ b/drivers/gpu/drm/radeon/rs600.c
> @@ -555,6 +555,7 @@ static int rs600_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* Enable bus master */
> tmp = RREG32(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
> WREG32(RADEON_BUS_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
> index 372016e..6aa6fea 100644
> --- a/drivers/gpu/drm/radeon/rv770.c
> +++ b/drivers/gpu/drm/radeon/rv770.c
> @@ -899,6 +899,7 @@ static int rv770_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 5d89b87..7d936e8 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -4249,6 +4249,7 @@ static int si_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> + radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
> (0xA << 7) |
