As per Color Manager design, each driver is responsible to load its
palette color correction and enhancement capabilities in the form of
a DRM blob property, so that user space can query and read.
This patch loads all CHV platform specific gamma color capabilities
for CRTC into a blob that can be accessible by user space to
query capabilities via DRM property interface.
Signed-off-by: Shashank Sharma <shashank.sharma at intel.com>
Signed-off-by: Kausal Malladi <Kausal.Malladi at intel.com>
---
drivers/gpu/drm/i915/intel_color_manager.c | 48 ++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_color_manager.h | 4 +++
2 files changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_color_manager.c
b/drivers/gpu/drm/i915/intel_color_manager.c
index baa4536..def20d0f 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.c
+++ b/drivers/gpu/drm/i915/intel_color_manager.c
@@ -27,15 +27,63 @@
#include "intel_color_manager.h"
+int get_chv_pipe_gamma_capabilities(struct drm_device *dev,
+ struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
+{
+ struct drm_property_blob *blob = NULL;
+ struct drm_mode_config *config = &dev->mode_config;
+ int ret;
+
+ /*
+ * This function exposes best capability for DeGamma and Gamma
+ * For CHV, the DeGamma LUT has 65 entries
+ * and the best Gamma capability has 257 entries (CGM unit)
+ */
+ palette_caps->version = CHV_PALETTE_STRUCT_VERSION;
+ palette_caps->num_samples_before_ctm =
+ CHV_DEGAMMA_MAX_VALS;
+ palette_caps->num_samples_after_ctm =
+ CHV_10BIT_GAMMA_MAX_VALS;
+
+ ret = drm_property_replace_global_blob(dev, &blob,
+ sizeof(struct drm_palette_caps),
+ (const void *)palette_caps,
+ &crtc->base, config->prop_color_capabilities);
+ if (ret) {
+ DRM_ERROR("Error updating Gamma blob\n");
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+int get_pipe_gamma_capabilities(struct drm_device *dev,
+ struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
+{
+ if (IS_CHERRYVIEW(dev))
+ return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc);
+ return -EINVAL;
+}
+
void intel_attach_color_properties_to_crtc(struct drm_device *dev,
struct drm_mode_object *mode_obj)
{
struct drm_mode_config *config = &dev->mode_config;
+ struct drm_palette_caps *palette_caps;
+ struct drm_crtc *crtc;
+ int ret;
if (IS_CHERRYVIEW(dev)) {
+ crtc = obj_to_crtc(mode_obj);
if (config->prop_color_capabilities)
drm_object_attach_property(mode_obj,
config->prop_color_capabilities, 0);
+ palette_caps = kzalloc(sizeof(struct drm_palette_caps),
+ GFP_KERNEL);
+ ret = get_pipe_gamma_capabilities(dev, palette_caps, crtc);
+ if (ret)
+ DRM_ERROR("Error getting gamma capability for CHV\n");
+
if (config->prop_palette_before_ctm)
drm_object_attach_property(mode_obj,
config->prop_palette_before_ctm, 0);
diff --git a/drivers/gpu/drm/i915/intel_color_manager.h
b/drivers/gpu/drm/i915/intel_color_manager.h
index 04c921d..51aeb91 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.h
+++ b/drivers/gpu/drm/i915/intel_color_manager.h
@@ -27,3 +27,7 @@
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include "i915_drv.h"
+
+#define CHV_PALETTE_STRUCT_VERSION 1
+#define CHV_DEGAMMA_MAX_VALS 65
+#define CHV_10BIT_GAMMA_MAX_VALS 257
--
2.4.5
