If a buffer is backed by dmabuf, wait on its reservation object's fences
before flipping.
Signed-off-by: Alex Goins <agoins at nvidia.com>
---
drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b2270d5..4867ff0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -44,6 +44,8 @@
#include <drm/drm_plane_helper.h>
#include <drm/drm_rect.h>
#include <linux/dma_remapping.h>
+#include <linux/reservation.h>
+#include <linux/dma-buf.h>
/* Primary plane formats for gen <= 3 */
static const uint32_t i8xx_primary_formats[] = {
@@ -11088,6 +11090,8 @@ static bool use_mmio_flip(struct intel_engine_cs *ring,
return true;
else if (i915.enable_execlists)
return true;
+ else if (obj->base.dma_buf && obj->base.dma_buf->resv->fence_excl)
+ return true;
else
return ring != i915_gem_request_get_ring(obj->last_write_req);
}
@@ -11170,8 +11174,18 @@ static void ilk_do_mmio_flip(struct intel_crtc
*intel_crtc)
static void intel_do_mmio_flip(struct intel_crtc *intel_crtc)
{
struct drm_device *dev = intel_crtc->base.dev;
+ struct intel_framebuffer *intel_fb =
+ to_intel_framebuffer(intel_crtc->base.primary->fb);
+ struct drm_i915_gem_object *obj = intel_fb->obj;
u32 start_vbl_count;
+ /* For framebuffer backed by dmabuf, wait for fence */
+ if (obj->base.dma_buf) {
+ reservation_object_wait_timeout_rcu(
+ obj->base.dma_buf->resv,
+ false, true, MAX_SCHEDULE_TIMEOUT);
+ }
+
intel_mark_page_flip_active(intel_crtc);
intel_pipe_update_start(intel_crtc, &start_vbl_count);
--
1.9.1
