Hi Christian, Am Dienstag, den 23.08.2016, 11:58 +0200 schrieb Christian Gmeiner: > 2016-08-22 13:01 GMT+02:00 Lucas Stach <l.stach at pengutronix.de>: > > Bit 30 of the interrupt status signals an MMU exception. Handle this > > condition properly and dump some useful registers. > > > > Signed-off-by: Lucas Stach <l.stach at pengutronix.de> > > --- [...] > > > > > > @@ -78,9 +78,10 @@ Copyright (C) 2015 > > #define VIVS_HI_AXI_STATUS_DET_RD_ERR 0x00000200 > > > > #define VIVS_HI_INTR_ACKNOWLEDGE 0x00000010 > > -#define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__MASK > > 0x7fffffff > > +#define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__MASK > > 0x3fffffff > > #define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__SHIFT 0 > > #define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC(x) (((x) << > > VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__SHIFT) & > > VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__MASK) > > +#define VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION 0x40000000 > > #define VIVS_HI_INTR_ACKNOWLEDGE_AXI_BUS_ERROR 0x80000000 > > > > #define VIVS_HI_INTR_ENBL 0x00000014 > > Where can I find the rnndb patch? Just share it and I will take care > that it gets integrated. > Sorry about that. It's still on my machine at home. Will post it in the evening.
Regards, Lucas
