We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to DISPC to output double-pixel mode.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen at ti.com>
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 8 ++++++++
 include/video/omapdss.h             | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 6b50476ec669..1e7f26985bda 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -104,6 +104,8 @@ struct dispc_features {
        bool supports_sync_align:1;

        bool has_writeback:1;
+
+       bool supports_double_pixel:1;
 };

 #define DISPC_MAX_NR_FIFOS 5
@@ -3287,6 +3289,10 @@ void dispc_mgr_set_timings(enum omap_channel channel,
        } else {
                if (t.interlace)
                        t.y_res /= 2;
+
+               if (dispc.feat->supports_double_pixel)
+                       REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0,
+                               19, 17);
        }

        dispc_mgr_set_size(channel, t.x_res, t.y_res);
@@ -3951,6 +3957,7 @@ static const struct dispc_features omap44xx_dispc_feats = 
{
        .set_max_preload        =       true,
        .supports_sync_align    =       true,
        .has_writeback          =       true,
+       .supports_double_pixel  =       true,
 };

 static const struct dispc_features omap54xx_dispc_feats = {
@@ -3974,6 +3981,7 @@ static const struct dispc_features omap54xx_dispc_feats = 
{
        .set_max_preload        =       true,
        .supports_sync_align    =       true,
        .has_writeback          =       true,
+       .supports_double_pixel  =       true,
 };

 static int dispc_init_features(struct platform_device *pdev)
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 86f28a92281a..6c1a3e1b4d55 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -367,6 +367,8 @@ struct omap_video_timings {
        enum omap_dss_signal_level de_level;
        /* Pixel clock edges to drive HSYNC and VSYNC signals */
        enum omap_dss_signal_edge sync_pclk_edge;
+
+       bool double_pixel;
 };

 /* Hardcoded timings for tv modes. Venc only uses these to
-- 
2.5.0

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