On Mon, 14 Dec 2015, Thierry Reding <thierry.reding at gmail.com> wrote:
> From: Thierry Reding <treding at nvidia.com>
>
> This helper chooses an appropriate configuration, according to the
> bitrate requirements of the video mode and the capabilities of the
> DisplayPort sink.
>
> Signed-off-by: Thierry Reding <treding at nvidia.com>
> ---
> drivers/gpu/drm/drm_dp_helper.c | 55
> +++++++++++++++++++++++++++++++++++++++++
> include/drm/drm_dp_helper.h | 5 ++++
> 2 files changed, 60 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index da519acfeba7..95825155dc89 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -512,6 +512,61 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct
> drm_dp_link *link)
> }
> EXPORT_SYMBOL(drm_dp_link_configure);
>
> +/**
> + * drm_dp_link_choose() - choose the lowest possible configuration for a mode
> + * @link: DRM DP link object
> + * @mode: DRM display mode
> + * @info: DRM display information
> + *
> + * According to the eDP specification, a source should select a configuration
> + * with the lowest number of lanes and the lowest possible link rate that can
> + * match the bitrate requirements of a video mode. However it must ensure not
> + * to exceed the capabilities of the sink.
Eventually this would have to take into account the intersection of
per-sink and per-source supported rates, including the intermediate
frequencies. Until then, i915 couldn't switch over.
BR,
Jani.
> + *
> + * Returns: 0 on success or a negative error code on failure.
> + */
> +int drm_dp_link_choose(struct drm_dp_link *link,
> + const struct drm_display_mode *mode,
> + const struct drm_display_info *info)
> +{
> + /* available link symbol clock rates */
> + static const unsigned int rates[3] = { 162000, 270000, 540000 };
> + /* available number of lanes */
> + static const unsigned int lanes[3] = { 1, 2, 4 };
> + unsigned long requirement, capacity;
> + unsigned int rate = link->max_rate;
> + unsigned int i, j;
> +
> + /* bandwidth requirement */
> + requirement = mode->clock * info->bpc * 3;
> +
> + for (i = 0; i < ARRAY_SIZE(lanes) && lanes[i] <= link->max_lanes; i++) {
> + for (j = 0; j < ARRAY_SIZE(rates) && rates[j] <= rate; j++) {
> + /*
> + * Capacity for this combination of lanes and rate,
> + * factoring in the ANSI 8B/10B encoding.
> + *
> + * Link rates in the DRM DP helpers are really link
> + * symbol frequencies, so a tenth of the actual rate
> + * of the link.
> + */
> + capacity = lanes[i] * (rates[j] * 10) * 8 / 10;
> +
> + if (capacity >= requirement) {
> + DRM_DEBUG_KMS("using %u lanes at %u kHz
> (%lu/%lu kbps)\n",
> + lanes[i], rates[j], requirement,
> + capacity);
> + link->lanes = lanes[i];
> + link->rate = rates[j];
> + return 0;
> + }
> + }
> + }
> +
> + return -ERANGE;
> +}
> +EXPORT_SYMBOL(drm_dp_link_choose);
> +
> /*
> * I2C-over-AUX implementation
> */
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 20ae0e413b64..f3eacf62add8 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -27,6 +27,8 @@
> #include <linux/i2c.h>
> #include <linux/delay.h>
>
> +#include <drm/drm_crtc.h>
> +
> /*
> * Unless otherwise noted, all values are from the DP 1.1a spec. Note that
> * DP and DPCD versions are independent. Differences from 1.0 are not noted,
> @@ -832,6 +834,9 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct
> drm_dp_link *link);
> int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
> int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
> int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);
> +int drm_dp_link_choose(struct drm_dp_link *link,
> + const struct drm_display_mode *mode,
> + const struct drm_display_info *info);
>
> int drm_dp_aux_register(struct drm_dp_aux *aux);
> void drm_dp_aux_unregister(struct drm_dp_aux *aux);
--
Jani Nikula, Intel Open Source Technology Center
