[PATCH 50/52] drm/amd/dal/dm: add polaris support

[Alex Deucher]

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c
index 1564485..5b3edb8 100644
--- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c
@@ -1007,6 +1007,10 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device 
*adev)
        case CHIP_FIJI:
        case CHIP_CARRIZO:
        case CHIP_STONEY:
+#if defined(CONFIG_DRM_AMD_DAL_DCE11_2)
+       case CHIP_POLARIS11:
+       case CHIP_POLARIS10:
+#endif
                if (dce110_register_irq_handlers(dm->adev)) {
                        DRM_ERROR("DM: Failed to initialize IRQ\n");
                        return -1;
@@ -1308,6 +1312,22 @@ static int dm_early_init(void *handle)
                if (adev->mode_info.funcs == NULL)
                        adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
                break;
+#if defined(CONFIG_DRM_AMD_DAL_DCE11_2)
+       case CHIP_POLARIS11:
+               adev->mode_info.num_crtc = 5;
+               adev->mode_info.num_hpd = 5;
+               adev->mode_info.num_dig = 5;
+               if (adev->mode_info.funcs == NULL)
+                       adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
+               break;
+       case CHIP_POLARIS10:
+               adev->mode_info.num_crtc = 6;
+               adev->mode_info.num_hpd = 6;
+               adev->mode_info.num_dig = 6;
+               if (adev->mode_info.funcs == NULL)
+                       adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
+               break;
+#endif
        default:
                DRM_ERROR("Usupported ASIC type: 0x%X\n", adev->asic_type);
                return -EINVAL;
-- 
2.5.0